276 lines
6.7 KiB
C
276 lines
6.7 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2011-2012 Stefan Bethke.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/errno.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/socket.h>
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#include <sys/sockio.h>
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#include <sys/sysctl.h>
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#include <sys/systm.h>
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#include <net/if.h>
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#include <net/if_arp.h>
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#include <net/ethernet.h>
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#include <net/if_dl.h>
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#include <net/if_media.h>
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#include <net/if_types.h>
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#include <machine/bus.h>
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#include <dev/iicbus/iic.h>
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#include <dev/iicbus/iiconf.h>
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#include <dev/iicbus/iicbus.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include <dev/mdio/mdio.h>
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#include <dev/etherswitch/etherswitch.h>
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#include <dev/etherswitch/arswitch/arswitchreg.h>
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#include <dev/etherswitch/arswitch/arswitchvar.h>
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#include <dev/etherswitch/arswitch/arswitch_reg.h>
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#include "mdio_if.h"
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#include "miibus_if.h"
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#include "etherswitch_if.h"
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static inline void
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arswitch_split_setpage(device_t dev, uint32_t addr, uint16_t *phy,
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uint16_t *reg)
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{
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struct arswitch_softc *sc = device_get_softc(dev);
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uint16_t page;
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page = (addr >> 9) & 0x1ff;
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*phy = (addr >> 6) & 0x7;
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*reg = (addr >> 1) & 0x1f;
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if (sc->page != page) {
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MDIO_WRITEREG(device_get_parent(dev), 0x18, 0, page);
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DELAY(2000);
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sc->page = page;
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}
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}
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/*
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* Read half a register. Some of the registers define control bits, and
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* the sequence of half-word accesses matters. The register addresses
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* are word-even (mod 4).
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*/
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static inline int
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arswitch_readreg16(device_t dev, int addr)
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{
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uint16_t phy, reg;
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arswitch_split_setpage(dev, addr, &phy, ®);
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return (MDIO_READREG(device_get_parent(dev), 0x10 | phy, reg));
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}
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/*
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* Write half a register. See above!
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*/
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static inline int
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arswitch_writereg16(device_t dev, int addr, int data)
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{
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uint16_t phy, reg;
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arswitch_split_setpage(dev, addr, &phy, ®);
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return (MDIO_WRITEREG(device_get_parent(dev), 0x10 | phy, reg, data));
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}
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/*
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* XXX NOTE:
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*
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* This may not work for AR7240 series embedded switches -
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* the per-PHY register space doesn't seem to be exposed.
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*
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* In that instance, it may be required to speak via
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* the internal switch PHY MDIO bus indirection.
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*/
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void
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arswitch_writedbg(device_t dev, int phy, uint16_t dbg_addr,
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uint16_t dbg_data)
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{
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(void) MDIO_WRITEREG(device_get_parent(dev), phy,
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MII_ATH_DBG_ADDR, dbg_addr);
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(void) MDIO_WRITEREG(device_get_parent(dev), phy,
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MII_ATH_DBG_DATA, dbg_data);
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}
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void
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arswitch_writemmd(device_t dev, int phy, uint16_t dbg_addr,
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uint16_t dbg_data)
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{
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(void) MDIO_WRITEREG(device_get_parent(dev), phy,
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MII_ATH_MMD_ADDR, dbg_addr);
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(void) MDIO_WRITEREG(device_get_parent(dev), phy,
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MII_ATH_MMD_DATA, dbg_data);
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}
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static uint32_t
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arswitch_reg_read32(device_t dev, int phy, int reg)
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{
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uint16_t lo, hi;
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lo = MDIO_READREG(device_get_parent(dev), phy, reg);
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hi = MDIO_READREG(device_get_parent(dev), phy, reg + 1);
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return (hi << 16) | lo;
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}
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static int
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arswitch_reg_write32(device_t dev, int phy, int reg, uint32_t value)
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{
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struct arswitch_softc *sc;
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int r;
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uint16_t lo, hi;
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sc = device_get_softc(dev);
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lo = value & 0xffff;
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hi = (uint16_t) (value >> 16);
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if (sc->mii_lo_first) {
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r = MDIO_WRITEREG(device_get_parent(dev),
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phy, reg, lo);
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r |= MDIO_WRITEREG(device_get_parent(dev),
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phy, reg + 1, hi);
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} else {
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r = MDIO_WRITEREG(device_get_parent(dev),
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phy, reg + 1, hi);
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r |= MDIO_WRITEREG(device_get_parent(dev),
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phy, reg, lo);
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}
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return r;
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}
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int
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arswitch_readreg(device_t dev, int addr)
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{
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uint16_t phy, reg;
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arswitch_split_setpage(dev, addr, &phy, ®);
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return arswitch_reg_read32(dev, 0x10 | phy, reg);
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}
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int
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arswitch_writereg(device_t dev, int addr, int value)
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{
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uint16_t phy, reg;
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arswitch_split_setpage(dev, addr, &phy, ®);
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return (arswitch_reg_write32(dev, 0x10 | phy, reg, value));
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}
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/*
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* Read/write 16 bit values in the switch register space.
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*
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* Some of the registers are control registers (eg the MDIO
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* data versus control space) and so need to be treated
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* differently.
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*/
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int
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arswitch_readreg_lsb(device_t dev, int addr)
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{
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return (arswitch_readreg16(dev, addr));
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}
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int
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arswitch_readreg_msb(device_t dev, int addr)
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{
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return (arswitch_readreg16(dev, addr + 2) << 16);
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}
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int
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arswitch_writereg_lsb(device_t dev, int addr, int data)
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{
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return (arswitch_writereg16(dev, addr, data & 0xffff));
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}
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int
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arswitch_writereg_msb(device_t dev, int addr, int data)
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{
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return (arswitch_writereg16(dev, addr + 2, (data >> 16) & 0xffff));
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}
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int
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arswitch_modifyreg(device_t dev, int addr, int mask, int set)
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{
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int value;
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uint16_t phy, reg;
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ARSWITCH_LOCK_ASSERT((struct arswitch_softc *)device_get_softc(dev),
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MA_OWNED);
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arswitch_split_setpage(dev, addr, &phy, ®);
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value = arswitch_reg_read32(dev, 0x10 | phy, reg);
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value &= ~mask;
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value |= set;
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return (arswitch_reg_write32(dev, 0x10 | phy, reg, value));
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}
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int
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arswitch_waitreg(device_t dev, int addr, int mask, int val, int timeout)
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{
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struct arswitch_softc *sc = device_get_softc(dev);
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int err, v;
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uint16_t phy, reg;
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ARSWITCH_LOCK_ASSERT(sc, MA_OWNED);
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arswitch_split_setpage(dev, addr, &phy, ®);
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err = -1;
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while (1) {
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v = arswitch_reg_read32(dev, 0x10 | phy, reg);
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v &= mask;
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if (v == val) {
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err = 0;
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break;
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}
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if (!timeout)
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break;
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DELAY(1);
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timeout--;
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}
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if (err != 0) {
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DPRINTF(sc, ARSWITCH_DBG_ANY,
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"%s: waitreg failed; addr=0x%08x, mask=0x%08x, val=0x%08x\n",
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__func__, addr, mask, val);
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}
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return (err);
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}
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