969 lines
25 KiB
C
969 lines
25 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2015-2016 Hiroki Mori.
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* Copyright (c) 2011-2012 Stefan Bethke.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include "opt_etherswitch.h"
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/errno.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/socket.h>
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#include <sys/sockio.h>
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#include <sys/sysctl.h>
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#include <sys/systm.h>
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#include <net/if.h>
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#include <net/if_var.h>
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#include <net/ethernet.h>
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#include <net/if_media.h>
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#include <net/if_types.h>
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#include <machine/bus.h>
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#include <dev/iicbus/iic.h>
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#include <dev/iicbus/iiconf.h>
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#include <dev/iicbus/iicbus.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include <dev/mdio/mdio.h>
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#include <dev/etherswitch/etherswitch.h>
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#include <dev/etherswitch/rtl8366/rtl8366rbvar.h>
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#include "mdio_if.h"
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#include "iicbus_if.h"
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#include "miibus_if.h"
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#include "etherswitch_if.h"
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struct rtl8366rb_softc {
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struct mtx sc_mtx; /* serialize access to softc */
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int smi_acquired; /* serialize access to SMI/I2C bus */
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struct mtx callout_mtx; /* serialize callout */
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device_t dev;
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int vid[RTL8366_NUM_VLANS];
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char *ifname[RTL8366_NUM_PHYS];
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device_t miibus[RTL8366_NUM_PHYS];
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if_t ifp[RTL8366_NUM_PHYS];
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struct callout callout_tick;
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etherswitch_info_t info;
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int chip_type;
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int phy4cpu;
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int numphys;
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};
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#define RTL_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
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#define RTL_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
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#define RTL_LOCK_ASSERT(_sc, _what) mtx_assert(&(_s)c->sc_mtx, (_what))
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#define RTL_TRYLOCK(_sc) mtx_trylock(&(_sc)->sc_mtx)
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#define RTL_WAITOK 0
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#define RTL_NOWAIT 1
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#define RTL_SMI_ACQUIRED 1
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#define RTL_SMI_ACQUIRED_ASSERT(_sc) \
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KASSERT((_sc)->smi_acquired == RTL_SMI_ACQUIRED, ("smi must be acquired @%s", __FUNCTION__))
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#if defined(DEBUG)
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#define DPRINTF(dev, args...) device_printf(dev, args)
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#define DEVERR(dev, err, fmt, args...) do { \
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if (err != 0) device_printf(dev, fmt, err, args); \
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} while (0)
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#define DEBUG_INCRVAR(var) do { \
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var++; \
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} while (0)
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static int callout_blocked = 0;
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static int iic_select_retries = 0;
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static int phy_access_retries = 0;
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static SYSCTL_NODE(_debug, OID_AUTO, rtl8366rb, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
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"rtl8366rb");
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SYSCTL_INT(_debug_rtl8366rb, OID_AUTO, callout_blocked, CTLFLAG_RW, &callout_blocked, 0,
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"number of times the callout couldn't acquire the bus");
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SYSCTL_INT(_debug_rtl8366rb, OID_AUTO, iic_select_retries, CTLFLAG_RW, &iic_select_retries, 0,
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"number of times the I2C bus selection had to be retried");
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SYSCTL_INT(_debug_rtl8366rb, OID_AUTO, phy_access_retries, CTLFLAG_RW, &phy_access_retries, 0,
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"number of times PHY register access had to be retried");
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#else
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#define DPRINTF(dev, args...)
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#define DEVERR(dev, err, fmt, args...)
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#define DEBUG_INCRVAR(var)
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#endif
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static int smi_probe(device_t dev);
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static int smi_read(device_t dev, uint16_t addr, uint16_t *data, int sleep);
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static int smi_write(device_t dev, uint16_t addr, uint16_t data, int sleep);
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static int smi_rmw(device_t dev, uint16_t addr, uint16_t mask, uint16_t data, int sleep);
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static void rtl8366rb_tick(void *arg);
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static int rtl8366rb_ifmedia_upd(if_t);
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static void rtl8366rb_ifmedia_sts(if_t, struct ifmediareq *);
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static void
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rtl8366rb_identify(driver_t *driver, device_t parent)
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{
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device_t child;
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struct iicbus_ivar *devi;
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if (device_find_child(parent, "rtl8366rb", -1) == NULL) {
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child = BUS_ADD_CHILD(parent, 0, "rtl8366rb", -1);
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devi = IICBUS_IVAR(child);
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devi->addr = RTL8366_IIC_ADDR;
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}
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}
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static int
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rtl8366rb_probe(device_t dev)
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{
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struct rtl8366rb_softc *sc;
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sc = device_get_softc(dev);
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bzero(sc, sizeof(*sc));
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if (smi_probe(dev) != 0)
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return (ENXIO);
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if (sc->chip_type == RTL8366RB)
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device_set_desc(dev, "RTL8366RB Ethernet Switch Controller");
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else
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device_set_desc(dev, "RTL8366SR Ethernet Switch Controller");
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return (BUS_PROBE_DEFAULT);
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}
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static void
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rtl8366rb_init(device_t dev)
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{
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struct rtl8366rb_softc *sc;
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int i;
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sc = device_get_softc(dev);
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/* Initialisation for TL-WR1043ND */
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#ifdef RTL8366_SOFT_RESET
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smi_rmw(dev, RTL8366_RCR,
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RTL8366_RCR_SOFT_RESET,
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RTL8366_RCR_SOFT_RESET, RTL_WAITOK);
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#else
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smi_rmw(dev, RTL8366_RCR,
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RTL8366_RCR_HARD_RESET,
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RTL8366_RCR_HARD_RESET, RTL_WAITOK);
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#endif
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/* hard reset not return ack */
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DELAY(100000);
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/* Enable 16 VLAN mode */
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smi_rmw(dev, RTL8366_SGCR,
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RTL8366_SGCR_EN_VLAN | RTL8366_SGCR_EN_VLAN_4KTB,
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RTL8366_SGCR_EN_VLAN, RTL_WAITOK);
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/* Initialize our vlan table. */
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for (i = 0; i <= 1; i++)
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sc->vid[i] = (i + 1) | ETHERSWITCH_VID_VALID;
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/* Remove port 0 from VLAN 1. */
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smi_rmw(dev, RTL8366_VMCR(RTL8366_VMCR_MU_REG, 0),
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(1 << 0), 0, RTL_WAITOK);
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/* Add port 0 untagged and port 5 tagged to VLAN 2. */
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smi_rmw(dev, RTL8366_VMCR(RTL8366_VMCR_MU_REG, 1),
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((1 << 5 | 1 << 0) << RTL8366_VMCR_MU_MEMBER_SHIFT)
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| ((1 << 5 | 1 << 0) << RTL8366_VMCR_MU_UNTAG_SHIFT),
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((1 << 5 | 1 << 0) << RTL8366_VMCR_MU_MEMBER_SHIFT
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| ((1 << 0) << RTL8366_VMCR_MU_UNTAG_SHIFT)),
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RTL_WAITOK);
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/* Set PVID 2 for port 0. */
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smi_rmw(dev, RTL8366_PVCR_REG(0),
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RTL8366_PVCR_VAL(0, RTL8366_PVCR_PORT_MASK),
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RTL8366_PVCR_VAL(0, 1), RTL_WAITOK);
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}
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static int
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rtl8366rb_attach(device_t dev)
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{
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struct rtl8366rb_softc *sc;
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uint16_t rev = 0;
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char name[IFNAMSIZ];
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int err = 0;
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int i;
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sc = device_get_softc(dev);
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sc->dev = dev;
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mtx_init(&sc->sc_mtx, "rtl8366rb", NULL, MTX_DEF);
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sc->smi_acquired = 0;
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mtx_init(&sc->callout_mtx, "rtl8366rbcallout", NULL, MTX_DEF);
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rtl8366rb_init(dev);
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smi_read(dev, RTL8366_CVCR, &rev, RTL_WAITOK);
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device_printf(dev, "rev. %d\n", rev & 0x000f);
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sc->phy4cpu = 0;
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(void) resource_int_value(device_get_name(dev), device_get_unit(dev),
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"phy4cpu", &sc->phy4cpu);
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sc->numphys = sc->phy4cpu ? RTL8366_NUM_PHYS - 1 : RTL8366_NUM_PHYS;
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sc->info.es_nports = sc->numphys + 1;
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sc->info.es_nvlangroups = RTL8366_NUM_VLANS;
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sc->info.es_vlan_caps = ETHERSWITCH_VLAN_DOT1Q;
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if (sc->chip_type == RTL8366RB)
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sprintf(sc->info.es_name, "Realtek RTL8366RB");
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else
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sprintf(sc->info.es_name, "Realtek RTL8366SR");
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/* attach miibus and phys */
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/* PHYs need an interface, so we generate a dummy one */
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for (i = 0; i < sc->numphys; i++) {
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sc->ifp[i] = if_alloc(IFT_ETHER);
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if (sc->ifp[i] == NULL) {
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device_printf(dev, "couldn't allocate ifnet structure\n");
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err = ENOMEM;
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break;
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}
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if_setsoftc(sc->ifp[i], sc);
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if_setflagbits(sc->ifp[i], IFF_UP | IFF_BROADCAST | IFF_DRV_RUNNING
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| IFF_SIMPLEX, 0);
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snprintf(name, IFNAMSIZ, "%sport", device_get_nameunit(dev));
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sc->ifname[i] = malloc(strlen(name)+1, M_DEVBUF, M_WAITOK);
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bcopy(name, sc->ifname[i], strlen(name)+1);
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if_initname(sc->ifp[i], sc->ifname[i], i);
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err = mii_attach(dev, &sc->miibus[i], sc->ifp[i], rtl8366rb_ifmedia_upd, \
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rtl8366rb_ifmedia_sts, BMSR_DEFCAPMASK, \
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i, MII_OFFSET_ANY, 0);
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if (err != 0) {
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device_printf(dev, "attaching PHY %d failed\n", i);
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return (err);
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}
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}
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bus_generic_probe(dev);
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bus_enumerate_hinted_children(dev);
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err = bus_generic_attach(dev);
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if (err != 0)
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return (err);
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callout_init_mtx(&sc->callout_tick, &sc->callout_mtx, 0);
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rtl8366rb_tick(sc);
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return (err);
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}
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static int
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rtl8366rb_detach(device_t dev)
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{
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struct rtl8366rb_softc *sc;
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int i;
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sc = device_get_softc(dev);
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for (i=0; i < sc->numphys; i++) {
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if (sc->miibus[i])
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device_delete_child(dev, sc->miibus[i]);
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if (sc->ifp[i] != NULL)
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if_free(sc->ifp[i]);
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free(sc->ifname[i], M_DEVBUF);
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}
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bus_generic_detach(dev);
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callout_drain(&sc->callout_tick);
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mtx_destroy(&sc->callout_mtx);
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mtx_destroy(&sc->sc_mtx);
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return (0);
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}
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static void
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rtl8366rb_update_ifmedia(int portstatus, u_int *media_status, u_int *media_active)
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{
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*media_active = IFM_ETHER;
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*media_status = IFM_AVALID;
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if ((portstatus & RTL8366_PLSR_LINK) != 0)
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*media_status |= IFM_ACTIVE;
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else {
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*media_active |= IFM_NONE;
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return;
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}
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switch (portstatus & RTL8366_PLSR_SPEED_MASK) {
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case RTL8366_PLSR_SPEED_10:
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*media_active |= IFM_10_T;
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break;
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case RTL8366_PLSR_SPEED_100:
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*media_active |= IFM_100_TX;
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break;
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case RTL8366_PLSR_SPEED_1000:
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*media_active |= IFM_1000_T;
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break;
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}
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if ((portstatus & RTL8366_PLSR_FULLDUPLEX) != 0)
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*media_active |= IFM_FDX;
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else
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*media_active |= IFM_HDX;
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if ((portstatus & RTL8366_PLSR_TXPAUSE) != 0)
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*media_active |= IFM_ETH_TXPAUSE;
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if ((portstatus & RTL8366_PLSR_RXPAUSE) != 0)
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*media_active |= IFM_ETH_RXPAUSE;
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}
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static void
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rtl833rb_miipollstat(struct rtl8366rb_softc *sc)
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{
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int i;
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struct mii_data *mii;
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struct mii_softc *miisc;
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uint16_t value;
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int portstatus;
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for (i = 0; i < sc->numphys; i++) {
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mii = device_get_softc(sc->miibus[i]);
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if ((i % 2) == 0) {
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if (smi_read(sc->dev, RTL8366_PLSR_BASE + i/2, &value, RTL_NOWAIT) != 0) {
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DEBUG_INCRVAR(callout_blocked);
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return;
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}
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portstatus = value & 0xff;
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} else {
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portstatus = (value >> 8) & 0xff;
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}
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rtl8366rb_update_ifmedia(portstatus, &mii->mii_media_status, &mii->mii_media_active);
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LIST_FOREACH(miisc, &mii->mii_phys, mii_list) {
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if (IFM_INST(mii->mii_media.ifm_cur->ifm_media) != miisc->mii_inst)
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continue;
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mii_phy_update(miisc, MII_POLLSTAT);
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}
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}
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}
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static void
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rtl8366rb_tick(void *arg)
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{
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struct rtl8366rb_softc *sc;
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sc = arg;
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rtl833rb_miipollstat(sc);
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callout_reset(&sc->callout_tick, hz, rtl8366rb_tick, sc);
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}
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static int
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smi_probe(device_t dev)
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{
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struct rtl8366rb_softc *sc;
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device_t iicbus, iicha;
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int err, i, j;
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uint16_t chipid;
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char bytes[2];
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int xferd;
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sc = device_get_softc(dev);
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iicbus = device_get_parent(dev);
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iicha = device_get_parent(iicbus);
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for (i = 0; i < 2; ++i) {
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iicbus_reset(iicbus, IIC_FASTEST, RTL8366_IIC_ADDR, NULL);
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for (j=3; j--; ) {
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IICBUS_STOP(iicha);
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/*
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* we go directly to the host adapter because iicbus.c
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* only issues a stop on a bus that was successfully started.
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*/
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}
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err = iicbus_request_bus(iicbus, dev, IIC_WAIT);
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if (err != 0)
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goto out;
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err = iicbus_start(iicbus, RTL8366_IIC_ADDR | RTL_IICBUS_READ, RTL_IICBUS_TIMEOUT);
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if (err != 0)
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goto out;
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if (i == 0) {
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bytes[0] = RTL8366RB_CIR & 0xff;
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bytes[1] = (RTL8366RB_CIR >> 8) & 0xff;
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} else {
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bytes[0] = RTL8366SR_CIR & 0xff;
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bytes[1] = (RTL8366SR_CIR >> 8) & 0xff;
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}
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err = iicbus_write(iicbus, bytes, 2, &xferd, RTL_IICBUS_TIMEOUT);
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if (err != 0)
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goto out;
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err = iicbus_read(iicbus, bytes, 2, &xferd, IIC_LAST_READ, 0);
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if (err != 0)
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goto out;
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chipid = ((bytes[1] & 0xff) << 8) | (bytes[0] & 0xff);
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if (i == 0 && chipid == RTL8366RB_CIR_ID8366RB) {
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DPRINTF(dev, "chip id 0x%04x\n", chipid);
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sc->chip_type = RTL8366RB;
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err = 0;
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break;
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}
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if (i == 1 && chipid == RTL8366SR_CIR_ID8366SR) {
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DPRINTF(dev, "chip id 0x%04x\n", chipid);
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sc->chip_type = RTL8366SR;
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err = 0;
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break;
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}
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if (i == 0) {
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iicbus_stop(iicbus);
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iicbus_release_bus(iicbus, dev);
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}
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}
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if (i == 2)
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err = ENXIO;
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out:
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iicbus_stop(iicbus);
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iicbus_release_bus(iicbus, dev);
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return (err == 0 ? 0 : ENXIO);
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}
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static int
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smi_acquire(struct rtl8366rb_softc *sc, int sleep)
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{
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int r = 0;
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if (sleep == RTL_WAITOK)
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RTL_LOCK(sc);
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else
|
|
if (RTL_TRYLOCK(sc) == 0)
|
|
return (EWOULDBLOCK);
|
|
if (sc->smi_acquired == RTL_SMI_ACQUIRED)
|
|
r = EBUSY;
|
|
else {
|
|
r = iicbus_request_bus(device_get_parent(sc->dev), sc->dev, \
|
|
sleep == RTL_WAITOK ? IIC_WAIT : IIC_DONTWAIT);
|
|
if (r == 0)
|
|
sc->smi_acquired = RTL_SMI_ACQUIRED;
|
|
}
|
|
RTL_UNLOCK(sc);
|
|
return (r);
|
|
}
|
|
|
|
static int
|
|
smi_release(struct rtl8366rb_softc *sc, int sleep)
|
|
{
|
|
if (sleep == RTL_WAITOK)
|
|
RTL_LOCK(sc);
|
|
else
|
|
if (RTL_TRYLOCK(sc) == 0)
|
|
return (EWOULDBLOCK);
|
|
RTL_SMI_ACQUIRED_ASSERT(sc);
|
|
iicbus_release_bus(device_get_parent(sc->dev), sc->dev);
|
|
sc->smi_acquired = 0;
|
|
RTL_UNLOCK(sc);
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
smi_select(device_t dev, int op, int sleep)
|
|
{
|
|
struct rtl8366rb_softc *sc;
|
|
int err, i;
|
|
device_t iicbus;
|
|
struct iicbus_ivar *devi;
|
|
int slave;
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
iicbus = device_get_parent(dev);
|
|
devi = IICBUS_IVAR(dev);
|
|
slave = devi->addr;
|
|
|
|
RTL_SMI_ACQUIRED_ASSERT((struct rtl8366rb_softc *)device_get_softc(dev));
|
|
|
|
if (sc->chip_type == RTL8366SR) { // RTL8366SR work around
|
|
// this is same work around at probe
|
|
for (int i=3; i--; )
|
|
IICBUS_STOP(device_get_parent(device_get_parent(dev)));
|
|
}
|
|
/*
|
|
* The chip does not use clock stretching when it is busy,
|
|
* instead ignoring the command. Retry a few times.
|
|
*/
|
|
for (i = RTL_IICBUS_RETRIES; i--; ) {
|
|
err = iicbus_start(iicbus, slave | op, RTL_IICBUS_TIMEOUT);
|
|
if (err != IIC_ENOACK)
|
|
break;
|
|
if (sleep == RTL_WAITOK) {
|
|
DEBUG_INCRVAR(iic_select_retries);
|
|
pause("smi_select", RTL_IICBUS_RETRY_SLEEP);
|
|
} else
|
|
break;
|
|
}
|
|
return (err);
|
|
}
|
|
|
|
static int
|
|
smi_read_locked(struct rtl8366rb_softc *sc, uint16_t addr, uint16_t *data, int sleep)
|
|
{
|
|
int err;
|
|
device_t iicbus;
|
|
char bytes[2];
|
|
int xferd;
|
|
|
|
iicbus = device_get_parent(sc->dev);
|
|
|
|
RTL_SMI_ACQUIRED_ASSERT(sc);
|
|
bytes[0] = addr & 0xff;
|
|
bytes[1] = (addr >> 8) & 0xff;
|
|
err = smi_select(sc->dev, RTL_IICBUS_READ, sleep);
|
|
if (err != 0)
|
|
goto out;
|
|
err = iicbus_write(iicbus, bytes, 2, &xferd, RTL_IICBUS_TIMEOUT);
|
|
if (err != 0)
|
|
goto out;
|
|
err = iicbus_read(iicbus, bytes, 2, &xferd, IIC_LAST_READ, 0);
|
|
if (err != 0)
|
|
goto out;
|
|
*data = ((bytes[1] & 0xff) << 8) | (bytes[0] & 0xff);
|
|
|
|
out:
|
|
iicbus_stop(iicbus);
|
|
return (err);
|
|
}
|
|
|
|
static int
|
|
smi_write_locked(struct rtl8366rb_softc *sc, uint16_t addr, uint16_t data, int sleep)
|
|
{
|
|
int err;
|
|
device_t iicbus;
|
|
char bytes[4];
|
|
int xferd;
|
|
|
|
iicbus = device_get_parent(sc->dev);
|
|
|
|
RTL_SMI_ACQUIRED_ASSERT(sc);
|
|
bytes[0] = addr & 0xff;
|
|
bytes[1] = (addr >> 8) & 0xff;
|
|
bytes[2] = data & 0xff;
|
|
bytes[3] = (data >> 8) & 0xff;
|
|
|
|
err = smi_select(sc->dev, RTL_IICBUS_WRITE, sleep);
|
|
if (err == 0)
|
|
err = iicbus_write(iicbus, bytes, 4, &xferd, RTL_IICBUS_TIMEOUT);
|
|
iicbus_stop(iicbus);
|
|
|
|
return (err);
|
|
}
|
|
|
|
static int
|
|
smi_read(device_t dev, uint16_t addr, uint16_t *data, int sleep)
|
|
{
|
|
struct rtl8366rb_softc *sc;
|
|
int err;
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
err = smi_acquire(sc, sleep);
|
|
if (err != 0)
|
|
return (EBUSY);
|
|
err = smi_read_locked(sc, addr, data, sleep);
|
|
smi_release(sc, sleep);
|
|
DEVERR(dev, err, "smi_read()=%d: addr=%04x\n", addr);
|
|
return (err == 0 ? 0 : EIO);
|
|
}
|
|
|
|
static int
|
|
smi_write(device_t dev, uint16_t addr, uint16_t data, int sleep)
|
|
{
|
|
struct rtl8366rb_softc *sc;
|
|
int err;
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
err = smi_acquire(sc, sleep);
|
|
if (err != 0)
|
|
return (EBUSY);
|
|
err = smi_write_locked(sc, addr, data, sleep);
|
|
smi_release(sc, sleep);
|
|
DEVERR(dev, err, "smi_write()=%d: addr=%04x\n", addr);
|
|
return (err == 0 ? 0 : EIO);
|
|
}
|
|
|
|
static int
|
|
smi_rmw(device_t dev, uint16_t addr, uint16_t mask, uint16_t data, int sleep)
|
|
{
|
|
struct rtl8366rb_softc *sc;
|
|
int err;
|
|
uint16_t oldv, newv;
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
err = smi_acquire(sc, sleep);
|
|
if (err != 0)
|
|
return (EBUSY);
|
|
if (err == 0) {
|
|
err = smi_read_locked(sc, addr, &oldv, sleep);
|
|
if (err == 0) {
|
|
newv = oldv & ~mask;
|
|
newv |= data & mask;
|
|
if (newv != oldv)
|
|
err = smi_write_locked(sc, addr, newv, sleep);
|
|
}
|
|
}
|
|
smi_release(sc, sleep);
|
|
DEVERR(dev, err, "smi_rmw()=%d: addr=%04x\n", addr);
|
|
return (err == 0 ? 0 : EIO);
|
|
}
|
|
|
|
static etherswitch_info_t *
|
|
rtl_getinfo(device_t dev)
|
|
{
|
|
struct rtl8366rb_softc *sc;
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
return (&sc->info);
|
|
}
|
|
|
|
static int
|
|
rtl_readreg(device_t dev, int reg)
|
|
{
|
|
uint16_t data;
|
|
|
|
data = 0;
|
|
|
|
smi_read(dev, reg, &data, RTL_WAITOK);
|
|
return (data);
|
|
}
|
|
|
|
static int
|
|
rtl_writereg(device_t dev, int reg, int value)
|
|
{
|
|
return (smi_write(dev, reg, value, RTL_WAITOK));
|
|
}
|
|
|
|
static int
|
|
rtl_getport(device_t dev, etherswitch_port_t *p)
|
|
{
|
|
struct rtl8366rb_softc *sc;
|
|
struct ifmedia *ifm;
|
|
struct mii_data *mii;
|
|
struct ifmediareq *ifmr;
|
|
uint16_t v;
|
|
int err, vlangroup;
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
ifmr = &p->es_ifmr;
|
|
|
|
if (p->es_port < 0 || p->es_port >= (sc->numphys + 1))
|
|
return (ENXIO);
|
|
if (sc->phy4cpu && p->es_port == sc->numphys) {
|
|
vlangroup = RTL8366_PVCR_GET(p->es_port + 1,
|
|
rtl_readreg(dev, RTL8366_PVCR_REG(p->es_port + 1)));
|
|
} else {
|
|
vlangroup = RTL8366_PVCR_GET(p->es_port,
|
|
rtl_readreg(dev, RTL8366_PVCR_REG(p->es_port)));
|
|
}
|
|
p->es_pvid = sc->vid[vlangroup] & ETHERSWITCH_VID_MASK;
|
|
|
|
if (p->es_port < sc->numphys) {
|
|
mii = device_get_softc(sc->miibus[p->es_port]);
|
|
ifm = &mii->mii_media;
|
|
err = ifmedia_ioctl(sc->ifp[p->es_port], &p->es_ifr, ifm, SIOCGIFMEDIA);
|
|
if (err)
|
|
return (err);
|
|
} else {
|
|
/* fill in fixed values for CPU port */
|
|
p->es_flags |= ETHERSWITCH_PORT_CPU;
|
|
smi_read(dev, RTL8366_PLSR_BASE + (RTL8366_NUM_PHYS)/2, &v, RTL_WAITOK);
|
|
v = v >> (8 * ((RTL8366_NUM_PHYS) % 2));
|
|
rtl8366rb_update_ifmedia(v, &ifmr->ifm_status, &ifmr->ifm_active);
|
|
ifmr->ifm_current = ifmr->ifm_active;
|
|
ifmr->ifm_mask = 0;
|
|
ifmr->ifm_status = IFM_ACTIVE | IFM_AVALID;
|
|
/* Return our static media list. */
|
|
if (ifmr->ifm_count > 0) {
|
|
ifmr->ifm_count = 1;
|
|
ifmr->ifm_ulist[0] = IFM_MAKEWORD(IFM_ETHER, IFM_1000_T,
|
|
IFM_FDX, 0);
|
|
} else
|
|
ifmr->ifm_count = 0;
|
|
}
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
rtl_setport(device_t dev, etherswitch_port_t *p)
|
|
{
|
|
struct rtl8366rb_softc *sc;
|
|
int i, err, vlangroup;
|
|
struct ifmedia *ifm;
|
|
struct mii_data *mii;
|
|
int port;
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
if (p->es_port < 0 || p->es_port >= (sc->numphys + 1))
|
|
return (ENXIO);
|
|
vlangroup = -1;
|
|
for (i = 0; i < RTL8366_NUM_VLANS; i++) {
|
|
if ((sc->vid[i] & ETHERSWITCH_VID_MASK) == p->es_pvid) {
|
|
vlangroup = i;
|
|
break;
|
|
}
|
|
}
|
|
if (vlangroup == -1)
|
|
return (ENXIO);
|
|
if (sc->phy4cpu && p->es_port == sc->numphys) {
|
|
port = p->es_port + 1;
|
|
} else {
|
|
port = p->es_port;
|
|
}
|
|
err = smi_rmw(dev, RTL8366_PVCR_REG(port),
|
|
RTL8366_PVCR_VAL(port, RTL8366_PVCR_PORT_MASK),
|
|
RTL8366_PVCR_VAL(port, vlangroup), RTL_WAITOK);
|
|
if (err)
|
|
return (err);
|
|
/* CPU Port */
|
|
if (p->es_port == sc->numphys)
|
|
return (0);
|
|
mii = device_get_softc(sc->miibus[p->es_port]);
|
|
ifm = &mii->mii_media;
|
|
err = ifmedia_ioctl(sc->ifp[p->es_port], &p->es_ifr, ifm, SIOCSIFMEDIA);
|
|
return (err);
|
|
}
|
|
|
|
static int
|
|
rtl_getvgroup(device_t dev, etherswitch_vlangroup_t *vg)
|
|
{
|
|
struct rtl8366rb_softc *sc;
|
|
uint16_t vmcr[3];
|
|
int i;
|
|
int member, untagged;
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
for (i=0; i<RTL8366_VMCR_MULT; i++)
|
|
vmcr[i] = rtl_readreg(dev, RTL8366_VMCR(i, vg->es_vlangroup));
|
|
|
|
vg->es_vid = sc->vid[vg->es_vlangroup];
|
|
member = RTL8366_VMCR_MEMBER(vmcr);
|
|
untagged = RTL8366_VMCR_UNTAG(vmcr);
|
|
if (sc->phy4cpu) {
|
|
vg->es_member_ports = ((member & 0x20) >> 1) | (member & 0x0f);
|
|
vg->es_untagged_ports = ((untagged & 0x20) >> 1) | (untagged & 0x0f);
|
|
} else {
|
|
vg->es_member_ports = member;
|
|
vg->es_untagged_ports = untagged;
|
|
}
|
|
vg->es_fid = RTL8366_VMCR_FID(vmcr);
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
rtl_setvgroup(device_t dev, etherswitch_vlangroup_t *vg)
|
|
{
|
|
struct rtl8366rb_softc *sc;
|
|
int g;
|
|
int member, untagged;
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
g = vg->es_vlangroup;
|
|
|
|
sc->vid[g] = vg->es_vid;
|
|
/* VLAN group disabled ? */
|
|
if (vg->es_member_ports == 0 && vg->es_untagged_ports == 0 && vg->es_vid == 0)
|
|
return (0);
|
|
sc->vid[g] |= ETHERSWITCH_VID_VALID;
|
|
rtl_writereg(dev, RTL8366_VMCR(RTL8366_VMCR_DOT1Q_REG, g),
|
|
(vg->es_vid << RTL8366_VMCR_DOT1Q_VID_SHIFT) & RTL8366_VMCR_DOT1Q_VID_MASK);
|
|
if (sc->phy4cpu) {
|
|
/* add space at phy4 */
|
|
member = (vg->es_member_ports & 0x0f) |
|
|
((vg->es_member_ports & 0x10) << 1);
|
|
untagged = (vg->es_untagged_ports & 0x0f) |
|
|
((vg->es_untagged_ports & 0x10) << 1);
|
|
} else {
|
|
member = vg->es_member_ports;
|
|
untagged = vg->es_untagged_ports;
|
|
}
|
|
if (sc->chip_type == RTL8366RB) {
|
|
rtl_writereg(dev, RTL8366_VMCR(RTL8366_VMCR_MU_REG, g),
|
|
((member << RTL8366_VMCR_MU_MEMBER_SHIFT) & RTL8366_VMCR_MU_MEMBER_MASK) |
|
|
((untagged << RTL8366_VMCR_MU_UNTAG_SHIFT) & RTL8366_VMCR_MU_UNTAG_MASK));
|
|
rtl_writereg(dev, RTL8366_VMCR(RTL8366_VMCR_FID_REG, g),
|
|
vg->es_fid);
|
|
} else {
|
|
rtl_writereg(dev, RTL8366_VMCR(RTL8366_VMCR_MU_REG, g),
|
|
((member << RTL8366_VMCR_MU_MEMBER_SHIFT) & RTL8366_VMCR_MU_MEMBER_MASK) |
|
|
((untagged << RTL8366_VMCR_MU_UNTAG_SHIFT) & RTL8366_VMCR_MU_UNTAG_MASK) |
|
|
((vg->es_fid << RTL8366_VMCR_FID_FID_SHIFT) & RTL8366_VMCR_FID_FID_MASK));
|
|
}
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
rtl_getconf(device_t dev, etherswitch_conf_t *conf)
|
|
{
|
|
|
|
/* Return the VLAN mode. */
|
|
conf->cmd = ETHERSWITCH_CONF_VLAN_MODE;
|
|
conf->vlan_mode = ETHERSWITCH_VLAN_DOT1Q;
|
|
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
rtl_readphy(device_t dev, int phy, int reg)
|
|
{
|
|
struct rtl8366rb_softc *sc;
|
|
uint16_t data;
|
|
int err, i, sleep;
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
data = 0;
|
|
|
|
if (phy < 0 || phy >= RTL8366_NUM_PHYS)
|
|
return (ENXIO);
|
|
if (reg < 0 || reg >= RTL8366_NUM_PHY_REG)
|
|
return (ENXIO);
|
|
sleep = RTL_WAITOK;
|
|
err = smi_acquire(sc, sleep);
|
|
if (err != 0)
|
|
return (EBUSY);
|
|
for (i = RTL_IICBUS_RETRIES; i--; ) {
|
|
err = smi_write_locked(sc, RTL8366_PACR, RTL8366_PACR_READ, sleep);
|
|
if (err == 0)
|
|
err = smi_write_locked(sc, RTL8366_PHYREG(phy, 0, reg), 0, sleep);
|
|
if (err == 0) {
|
|
err = smi_read_locked(sc, RTL8366_PADR, &data, sleep);
|
|
break;
|
|
}
|
|
DEBUG_INCRVAR(phy_access_retries);
|
|
DPRINTF(dev, "rtl_readphy(): chip not responsive, retrying %d more times\n", i);
|
|
pause("rtl_readphy", RTL_IICBUS_RETRY_SLEEP);
|
|
}
|
|
smi_release(sc, sleep);
|
|
DEVERR(dev, err, "rtl_readphy()=%d: phy=%d.%02x\n", phy, reg);
|
|
return (data);
|
|
}
|
|
|
|
static int
|
|
rtl_writephy(device_t dev, int phy, int reg, int data)
|
|
{
|
|
struct rtl8366rb_softc *sc;
|
|
int err, i, sleep;
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
if (phy < 0 || phy >= RTL8366_NUM_PHYS)
|
|
return (ENXIO);
|
|
if (reg < 0 || reg >= RTL8366_NUM_PHY_REG)
|
|
return (ENXIO);
|
|
sleep = RTL_WAITOK;
|
|
err = smi_acquire(sc, sleep);
|
|
if (err != 0)
|
|
return (EBUSY);
|
|
for (i = RTL_IICBUS_RETRIES; i--; ) {
|
|
err = smi_write_locked(sc, RTL8366_PACR, RTL8366_PACR_WRITE, sleep);
|
|
if (err == 0)
|
|
err = smi_write_locked(sc, RTL8366_PHYREG(phy, 0, reg), data, sleep);
|
|
if (err == 0) {
|
|
break;
|
|
}
|
|
DEBUG_INCRVAR(phy_access_retries);
|
|
DPRINTF(dev, "rtl_writephy(): chip not responsive, retrying %d more tiems\n", i);
|
|
pause("rtl_writephy", RTL_IICBUS_RETRY_SLEEP);
|
|
}
|
|
smi_release(sc, sleep);
|
|
DEVERR(dev, err, "rtl_writephy()=%d: phy=%d.%02x\n", phy, reg);
|
|
return (err == 0 ? 0 : EIO);
|
|
}
|
|
|
|
static int
|
|
rtl8366rb_ifmedia_upd(if_t ifp)
|
|
{
|
|
struct rtl8366rb_softc *sc;
|
|
struct mii_data *mii;
|
|
|
|
sc = if_getsoftc(ifp);
|
|
mii = device_get_softc(sc->miibus[if_getdunit(ifp)]);
|
|
|
|
mii_mediachg(mii);
|
|
return (0);
|
|
}
|
|
|
|
static void
|
|
rtl8366rb_ifmedia_sts(if_t ifp, struct ifmediareq *ifmr)
|
|
{
|
|
struct rtl8366rb_softc *sc;
|
|
struct mii_data *mii;
|
|
|
|
sc = if_getsoftc(ifp);
|
|
mii = device_get_softc(sc->miibus[if_getdunit(ifp)]);
|
|
|
|
mii_pollstat(mii);
|
|
ifmr->ifm_active = mii->mii_media_active;
|
|
ifmr->ifm_status = mii->mii_media_status;
|
|
}
|
|
|
|
|
|
static device_method_t rtl8366rb_methods[] = {
|
|
/* Device interface */
|
|
DEVMETHOD(device_identify, rtl8366rb_identify),
|
|
DEVMETHOD(device_probe, rtl8366rb_probe),
|
|
DEVMETHOD(device_attach, rtl8366rb_attach),
|
|
DEVMETHOD(device_detach, rtl8366rb_detach),
|
|
|
|
/* bus interface */
|
|
DEVMETHOD(bus_add_child, device_add_child_ordered),
|
|
|
|
/* MII interface */
|
|
DEVMETHOD(miibus_readreg, rtl_readphy),
|
|
DEVMETHOD(miibus_writereg, rtl_writephy),
|
|
|
|
/* MDIO interface */
|
|
DEVMETHOD(mdio_readreg, rtl_readphy),
|
|
DEVMETHOD(mdio_writereg, rtl_writephy),
|
|
|
|
/* etherswitch interface */
|
|
DEVMETHOD(etherswitch_getconf, rtl_getconf),
|
|
DEVMETHOD(etherswitch_getinfo, rtl_getinfo),
|
|
DEVMETHOD(etherswitch_readreg, rtl_readreg),
|
|
DEVMETHOD(etherswitch_writereg, rtl_writereg),
|
|
DEVMETHOD(etherswitch_readphyreg, rtl_readphy),
|
|
DEVMETHOD(etherswitch_writephyreg, rtl_writephy),
|
|
DEVMETHOD(etherswitch_getport, rtl_getport),
|
|
DEVMETHOD(etherswitch_setport, rtl_setport),
|
|
DEVMETHOD(etherswitch_getvgroup, rtl_getvgroup),
|
|
DEVMETHOD(etherswitch_setvgroup, rtl_setvgroup),
|
|
|
|
DEVMETHOD_END
|
|
};
|
|
|
|
DEFINE_CLASS_0(rtl8366rb, rtl8366rb_driver, rtl8366rb_methods,
|
|
sizeof(struct rtl8366rb_softc));
|
|
|
|
DRIVER_MODULE(rtl8366rb, iicbus, rtl8366rb_driver, 0, 0);
|
|
DRIVER_MODULE(miibus, rtl8366rb, miibus_driver, 0, 0);
|
|
DRIVER_MODULE(mdio, rtl8366rb, mdio_driver, 0, 0);
|
|
DRIVER_MODULE(etherswitch, rtl8366rb, etherswitch_driver, 0, 0);
|
|
MODULE_VERSION(rtl8366rb, 1);
|
|
MODULE_DEPEND(rtl8366rb, iicbus, 1, 1, 1); /* XXX which versions? */
|
|
MODULE_DEPEND(rtl8366rb, miibus, 1, 1, 1); /* XXX which versions? */
|
|
MODULE_DEPEND(rtl8366rb, etherswitch, 1, 1, 1); /* XXX which versions? */
|