6699c22c1c
Simply moving the interrupt allocation and release functions into files which belong to the architecture. Since x86 interrupt handling is quite distinct from other architectures, this is a crucial necessary step. Identifying the border between x86 and architecture-independent is actually quite tricky. Similarly, getting the prototypes for the border right is also quite tricky. Inspired by the work of Julien Grall <julien@xen.org>, 2015-10-20 09:14:56, but heavily adjusted. Reviewed by: royger Differential Revision: https://reviews.freebsd.org/D30936
386 lines
9.8 KiB
C
386 lines
9.8 KiB
C
/*-
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* SPDX-License-Identifier: MIT OR GPL-2.0-only
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*
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* Copyright © 2015 Julien Grall
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* Copyright © 2013 Spectra Logic Corporation
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* Copyright © 2018 John Baldwin/The FreeBSD Foundation
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* Copyright © 2019 Roger Pau Monné/Citrix Systems R&D
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* Copyright © 2021 Elliott Mitchell
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*
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* This file may be distributed separately from the Linux kernel, or
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* incorporated into other software packages, subject to the following license:
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this source file (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy, modify,
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* merge, publish, distribute, sublicense, and/or sell copies of the Software,
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* and to permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/limits.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/interrupt.h>
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#include <sys/pcpu.h>
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#include <sys/proc.h>
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#include <sys/smp.h>
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#include <sys/stddef.h>
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#include <xen/xen-os.h>
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#include <xen/xen_intr.h>
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#include <machine/xen/arch-intr.h>
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#include <x86/apicvar.h>
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/************************ Xen x86 interrupt interface ************************/
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/*
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* Pointers to the interrupt counters
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*/
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DPCPU_DEFINE_STATIC(u_long *, pintrcnt);
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static void
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xen_intrcnt_init(void *dummy __unused)
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{
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unsigned int i;
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if (!xen_domain())
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return;
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CPU_FOREACH(i) {
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char buf[MAXCOMLEN + 1];
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snprintf(buf, sizeof(buf), "cpu%d:xen", i);
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intrcnt_add(buf, DPCPU_ID_PTR(i, pintrcnt));
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}
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}
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SYSINIT(xen_intrcnt_init, SI_SUB_INTR, SI_ORDER_MIDDLE, xen_intrcnt_init, NULL);
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/*
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* Transition from assembly language, called from
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* sys/{amd64/amd64|i386/i386}/apic_vector.S
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*/
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extern void xen_arch_intr_handle_upcall(struct trapframe *);
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void
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xen_arch_intr_handle_upcall(struct trapframe *trap_frame)
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{
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struct trapframe *old;
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/*
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* Disable preemption in order to always check and fire events
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* on the right vCPU
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*/
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critical_enter();
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++*DPCPU_GET(pintrcnt);
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++curthread->td_intr_nesting_level;
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old = curthread->td_intr_frame;
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curthread->td_intr_frame = trap_frame;
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xen_intr_handle_upcall(NULL);
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curthread->td_intr_frame = old;
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--curthread->td_intr_nesting_level;
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if (xen_evtchn_needs_ack)
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lapic_eoi();
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critical_exit();
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}
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/******************************** EVTCHN PIC *********************************/
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static MALLOC_DEFINE(M_XENINTR, "xen_intr", "Xen Interrupt Services");
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/*
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* Lock for x86-related structures. Notably modifying
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* xen_intr_auto_vector_count, and allocating interrupts require this lock be
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* held.
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*/
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static struct mtx xen_intr_x86_lock;
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static u_int first_evtchn_irq;
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static u_int xen_intr_auto_vector_count;
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/*
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* list of released isrcs
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* This is meant to overlay struct xenisrc, with only the xen_arch_isrc_t
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* portion being preserved, everything else can be wiped.
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*/
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struct avail_list {
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xen_arch_isrc_t preserve;
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SLIST_ENTRY(avail_list) free;
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};
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static SLIST_HEAD(free, avail_list) avail_list =
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SLIST_HEAD_INITIALIZER(avail_list);
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void
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xen_intr_alloc_irqs(void)
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{
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if (num_io_irqs > UINT_MAX - NR_EVENT_CHANNELS)
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panic("IRQ allocation overflow (num_msi_irqs too high?)");
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first_evtchn_irq = num_io_irqs;
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num_io_irqs += NR_EVENT_CHANNELS;
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}
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static void
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xen_intr_pic_enable_source(struct intsrc *isrc)
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{
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_Static_assert(offsetof(struct xenisrc, xi_arch.intsrc) == 0,
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"xi_arch MUST be at top of xenisrc for x86");
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xen_intr_enable_source((struct xenisrc *)isrc);
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}
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/*
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* Perform any necessary end-of-interrupt acknowledgements.
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*
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* \param isrc The interrupt source to EOI.
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*/
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static void
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xen_intr_pic_disable_source(struct intsrc *isrc, int eoi)
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{
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_Static_assert(offsetof(struct xenisrc, xi_arch.intsrc) == 0,
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"xi_arch MUST be at top of xenisrc for x86");
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xen_intr_disable_source((struct xenisrc *)isrc);
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}
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static void
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xen_intr_pic_eoi_source(struct intsrc *isrc)
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{
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/* Nothing to do on end-of-interrupt */
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}
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static void
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xen_intr_pic_enable_intr(struct intsrc *isrc)
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{
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_Static_assert(offsetof(struct xenisrc, xi_arch.intsrc) == 0,
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"xi_arch MUST be at top of xenisrc for x86");
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xen_intr_enable_intr((struct xenisrc *)isrc);
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}
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static void
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xen_intr_pic_disable_intr(struct intsrc *isrc)
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{
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_Static_assert(offsetof(struct xenisrc, xi_arch.intsrc) == 0,
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"xi_arch MUST be at top of xenisrc for x86");
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xen_intr_disable_intr((struct xenisrc *)isrc);
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}
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/**
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* Determine the global interrupt vector number for
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* a Xen interrupt source.
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*
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* \param isrc The interrupt source to query.
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*
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* \return The vector number corresponding to the given interrupt source.
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*/
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static int
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xen_intr_pic_vector(struct intsrc *isrc)
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{
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_Static_assert(offsetof(struct xenisrc, xi_arch.intsrc) == 0,
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"xi_arch MUST be at top of xenisrc for x86");
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return (((struct xenisrc *)isrc)->xi_arch.vector);
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}
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/**
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* Determine whether or not interrupt events are pending on the
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* the given interrupt source.
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*
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* \param isrc The interrupt source to query.
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*
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* \returns 0 if no events are pending, otherwise non-zero.
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*/
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static int
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xen_intr_pic_source_pending(struct intsrc *isrc)
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{
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/*
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* EventChannels are edge triggered and never masked.
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* There can be no pending events.
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*/
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return (0);
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}
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/**
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* Prepare this PIC for system suspension.
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*/
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static void
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xen_intr_pic_suspend(struct pic *pic)
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{
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/* Nothing to do on suspend */
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}
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static void
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xen_intr_pic_resume(struct pic *pic, bool suspend_cancelled)
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{
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if (!suspend_cancelled)
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xen_intr_resume();
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}
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/**
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* Perform configuration of an interrupt source.
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*
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* \param isrc The interrupt source to configure.
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* \param trig Edge or level.
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* \param pol Active high or low.
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*
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* \returns 0 if no events are pending, otherwise non-zero.
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*/
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static int
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xen_intr_pic_config_intr(struct intsrc *isrc, enum intr_trigger trig,
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enum intr_polarity pol)
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{
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/* Configuration is only possible via the evtchn apis. */
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return (ENODEV);
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}
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static int
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xen_intr_pic_assign_cpu(struct intsrc *isrc, u_int apic_id)
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{
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_Static_assert(offsetof(struct xenisrc, xi_arch.intsrc) == 0,
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"xi_arch MUST be at top of xenisrc for x86");
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return (xen_intr_assign_cpu((struct xenisrc *)isrc,
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apic_cpuid(apic_id)));
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}
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/**
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* PIC interface for all event channel port types except physical IRQs.
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*/
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static struct pic xen_intr_pic = {
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.pic_enable_source = xen_intr_pic_enable_source,
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.pic_disable_source = xen_intr_pic_disable_source,
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.pic_eoi_source = xen_intr_pic_eoi_source,
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.pic_enable_intr = xen_intr_pic_enable_intr,
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.pic_disable_intr = xen_intr_pic_disable_intr,
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.pic_vector = xen_intr_pic_vector,
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.pic_source_pending = xen_intr_pic_source_pending,
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.pic_suspend = xen_intr_pic_suspend,
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.pic_resume = xen_intr_pic_resume,
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.pic_config_intr = xen_intr_pic_config_intr,
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.pic_assign_cpu = xen_intr_pic_assign_cpu,
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};
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/******************************* ARCH wrappers *******************************/
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void
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xen_arch_intr_init(void)
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{
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int error;
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mtx_init(&xen_intr_x86_lock, "xen-x86-table-lock", NULL, MTX_DEF);
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error = intr_register_pic(&xen_intr_pic);
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if (error != 0)
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panic("%s(): failed registering Xen/x86 PIC, error=%d\n",
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__func__, error);
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}
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/**
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* Allocate a Xen interrupt source object.
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*
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* \param type The type of interrupt source to create.
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*
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* \return A pointer to a newly allocated Xen interrupt source
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* object or NULL.
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*/
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struct xenisrc *
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xen_arch_intr_alloc(void)
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{
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static int warned;
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struct xenisrc *isrc;
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unsigned int vector;
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int error;
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mtx_lock(&xen_intr_x86_lock);
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isrc = (struct xenisrc *)SLIST_FIRST(&avail_list);
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if (isrc != NULL) {
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SLIST_REMOVE_HEAD(&avail_list, free);
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mtx_unlock(&xen_intr_x86_lock);
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KASSERT(isrc->xi_arch.intsrc.is_pic == &xen_intr_pic,
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("interrupt not owned by Xen code?"));
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KASSERT(isrc->xi_arch.intsrc.is_handlers == 0,
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("Free evtchn still has handlers"));
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return (isrc);
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}
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if (xen_intr_auto_vector_count >= NR_EVENT_CHANNELS) {
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if (!warned) {
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warned = 1;
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printf("%s: Xen interrupts exhausted.\n", __func__);
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}
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mtx_unlock(&xen_intr_x86_lock);
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return (NULL);
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}
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vector = first_evtchn_irq + xen_intr_auto_vector_count;
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xen_intr_auto_vector_count++;
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KASSERT((intr_lookup_source(vector) == NULL),
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("Trying to use an already allocated vector"));
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mtx_unlock(&xen_intr_x86_lock);
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isrc = malloc(sizeof(*isrc), M_XENINTR, M_WAITOK | M_ZERO);
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isrc->xi_arch.intsrc.is_pic = &xen_intr_pic;
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isrc->xi_arch.vector = vector;
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error = intr_register_source(&isrc->xi_arch.intsrc);
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if (error != 0)
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panic("%s(): failed registering interrupt %u, error=%d\n",
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__func__, vector, error);
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return (isrc);
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}
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void
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xen_arch_intr_release(struct xenisrc *isrc)
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{
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KASSERT(isrc->xi_arch.intsrc.is_handlers == 0,
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("Release called, but xenisrc still in use"));
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_Static_assert(sizeof(struct xenisrc) >= sizeof(struct avail_list),
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"unused structure MUST be no larger than in-use structure");
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_Static_assert(offsetof(struct xenisrc, xi_arch) ==
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offsetof(struct avail_list, preserve),
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"unused structure does not properly overlay in-use structure");
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mtx_lock(&xen_intr_x86_lock);
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SLIST_INSERT_HEAD(&avail_list, (struct avail_list *)isrc, free);
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mtx_unlock(&xen_intr_x86_lock);
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}
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