Bjoern A. Zeeb 1f420ed469 The GIC (v2 at least) has a bit in the TYPER register to indicate whether the GIC ... supports the Security Extensions or not. This bit is not the same as the CPU one. Currently we are not checking for either before trying to write to the special registers. This can lead to problems on hardware or simulators that do not provide the security extensions. Add the missing checks. Their interactions with the CPU flag is not entirely clear to me but using a macro will make it easier to quickly adjust the condition once the CPU bits are sorted as well. Reviewed by: br Sponsored by: DARPA/AFRL Differential Revision: https://reviews.freebsd.org/D6397		2016-05-17 13:12:26 +00:00
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acpica	Add ARM64TODO comments to ACPI PCI stubs	2015-07-12 18:32:16 +00:00
arm64	The GIC (v2 at least) has a bit in the TYPER register to indicate whether the GIC	2016-05-17 13:12:26 +00:00
cavium	Teach the ThunderX PCI PEM driver about intrng. This will be used later	2016-05-16 10:03:57 +00:00
cloudabi64	Make CloudABI's way of doing TLS more friendly to userspace emulators.	2016-04-06 11:11:31 +00:00
conf	Add an arm64 kernel config to help testing intrng. It is expected this	2016-05-17 12:48:30 +00:00
include	Add support for intrng to arm64. As the GICv3 drivers will need to be	2016-05-16 10:48:51 +00:00