352 lines
6.9 KiB
ArmAsm
352 lines
6.9 KiB
ArmAsm
/*
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* $FreeBSD$
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* From: $NetBSD: pal.s,v 1.12 1998/02/27 03:44:53 thorpej Exp $
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*/
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/*
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* Copyright (c) 1994, 1995 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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/*
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* The various OSF PALcode routines.
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*
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* The following code is originally derived from pages: (I) 6-5 - (I) 6-7
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* and (III) 2-1 - (III) 2-25 of "Alpha Architecture Reference Manual" by
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* Richard L. Sites.
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*
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* Updates taken from pages: (II-B) 2-1 - (II-B) 2-33 of "Alpha AXP
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* Architecture Reference Manual, Second Edition" by Richard L. Sites
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* and Richard T. Witek.
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*/
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#include <machine/asm.h>
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inc2: .stabs __FILE__,132,0,0,inc2; .loc 1 __LINE__
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/*
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* alpha_rpcc: read process cycle counter (XXX INSTRUCTION, NOT PALcode OP)
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*/
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.text
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LEAF(alpha_rpcc,1)
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rpcc v0
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RET
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END(alpha_rpcc)
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/*
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* alpha_mb: memory barrier (XXX INSTRUCTION, NOT PALcode OP)
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*/
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.text
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LEAF(alpha_mb,0)
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mb
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RET
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END(alpha_mb)
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/*
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* alpha_wmb: write memory barrier (XXX INSTRUCTION, NOT PALcode OP)
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*/
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.text
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LEAF(alpha_wmb,0)
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/* wmb XXX */
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mb /* XXX */
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RET
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END(alpha_wmb)
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/*
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* alpha_amask: read architecture features (XXX INSTRUCTION, NOT PALcode OP)
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*
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* Arguments:
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* a0 bitmask of features to test
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*
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* Returns:
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* v0 bitmask - bit is _cleared_ if feature is supported
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*/
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.text
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LEAF(alpha_amask,1)
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amask a0, v0
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RET
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END(alpha_amask)
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/*
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* alpha_implver: read implementation version (XXX INSTRUCTION, NOT PALcode OP)
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*
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* Returns:
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* v0 implementation version - see <machine/alpha_cpu.h>
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*/
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.text
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LEAF(alpha_implver,0)
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#if 0
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implver 0x1, v0
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#else
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.long 0x47e03d80 /* XXX gas(1) does the Wrong Thing */
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#endif
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RET
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END(alpha_implver)
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/*
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* alpha_pal_imb: I-Stream memory barrier. [UNPRIVILEGED]
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* (Makes instruction stream coherent with data stream.)
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*/
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.text
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LEAF(alpha_pal_imb,0)
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call_pal PAL_imb
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RET
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END(alpha_pal_imb)
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/*
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* alpha_pal_cflush: Cache flush [PRIVILEGED]
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*
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* Flush the entire physical page specified by the PFN specified in
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* a0 from any data caches associated with the current processor.
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*
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* Arguments:
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* a0 page frame number of page to flush
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*/
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.text
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LEAF(alpha_pal_cflush,1)
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call_pal PAL_cflush
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RET
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END(alpha_pal_cflush)
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/*
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* alpha_pal_draina: Drain aborts. [PRIVILEGED]
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*/
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.text
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LEAF(alpha_pal_draina,0)
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call_pal PAL_draina
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RET
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END(alpha_pal_draina)
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/*
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* alpha_pal_halt: Halt the processor. [PRIVILEGED]
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*/
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.text
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LEAF(alpha_pal_halt,0)
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call_pal PAL_halt
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br zero,alpha_pal_halt /* Just in case */
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RET
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END(alpha_pal_halt)
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/*
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* alpha_pal_rdmces: Read MCES processor register. [PRIVILEGED]
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*
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* Return:
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* v0 current MCES value
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*/
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.text
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LEAF(alpha_pal_rdmces,1)
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call_pal PAL_OSF1_rdmces
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RET
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END(alpha_pal_rdmces)
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/*
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* alpha_pal_rdps: Read processor status. [PRIVILEGED]
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*
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* Return:
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* v0 current PS value
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*/
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.text
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LEAF(alpha_pal_rdps,0)
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call_pal PAL_OSF1_rdps
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RET
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END(alpha_pal_rdps)
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/*
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* alpha_pal_rdusp: Read user stack pointer. [PRIVILEGED]
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*
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* Return:
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* v0 current user stack pointer
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*/
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.text
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LEAF(alpha_pal_rdusp,0)
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call_pal PAL_OSF1_rdusp
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RET
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END(alpha_pal_rdusp)
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/*
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* alpha_pal_rdval: Read system value. [PRIVILEGED]
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*
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* Returns the sysvalue in v0, allowing access to a 64-bit
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* per-processor value for use by the operating system.
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*
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* Return:
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* v0 sysvalue
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*/
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.text
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LEAF(alpha_pal_rdval,0)
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call_pal PAL_OSF1_rdval
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RET
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END(alpha_pal_rdval)
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/*
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* alpha_pal_swpipl: Swap Interrupt priority level. [PRIVILEGED]
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* _alpha_pal_swpipl: Same, from profiling code. [PRIVILEGED]
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*
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* Arguments:
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* a0 new IPL
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*
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* Return:
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* v0 old IPL
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*/
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.text
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LEAF(alpha_pal_swpipl,1)
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call_pal PAL_OSF1_swpipl
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RET
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END(alpha_pal_swpipl)
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LEAF_NOPROFILE(_alpha_pal_swpipl,1)
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call_pal PAL_OSF1_swpipl
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RET
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END(_alpha_pal_swpipl)
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/*
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* alpha_pal_tbi: Translation buffer invalidate. [PRIVILEGED]
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*
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* Arguments:
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* a0 operation selector
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* a1 address to operate on (if necessary)
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*/
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.text
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LEAF(alpha_pal_tbi,2)
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call_pal PAL_OSF1_tbi
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RET
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END(alpha_pal_tbi)
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/*
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* alpha_pal_whami: Who am I? [PRIVILEGED]
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*
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* Return:
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* v0 processor number
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*/
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.text
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LEAF(alpha_pal_whami,0)
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call_pal PAL_OSF1_whami
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RET
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END(alpha_pal_whami)
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/*
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* alpha_pal_wrent: Write system entry address. [PRIVILEGED]
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*
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* Arguments:
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* a0 new vector
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* a1 vector selector
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*/
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.text
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LEAF(alpha_pal_wrent,2)
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call_pal PAL_OSF1_wrent
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RET
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END(alpha_pal_wrent)
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/*
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* alpha_pal_wrfen: Write floating-point enable. [PRIVILEGED]
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*
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* Arguments:
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* a0 new enable value (val & 0x1 -> enable).
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*/
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.text
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LEAF(alpha_pal_wrfen,1)
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call_pal PAL_OSF1_wrfen
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RET
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END(alpha_pal_wrfen)
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/*
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* alpha_pal_wripir: Write interprocessor interrupt request. [PRIVILEGED]
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*
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* Generate an interprocessor interrupt on the processor specified by
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* processor number in a0.
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*
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* Arguments:
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* a0 processor to interrupt
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*/
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.text
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LEAF(alpha_pal_wripir,1)
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call_pal PAL_ipir
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RET
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END(alpha_pal_wripir)
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/*
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* alpha_pal_wrusp: Write user stack pointer. [PRIVILEGED]
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*
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* Arguments:
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* a0 new user stack pointer
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*/
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.text
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LEAF(alpha_pal_wrusp,1)
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call_pal PAL_OSF1_wrusp
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RET
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END(alpha_pal_wrusp)
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/*
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* alpha_pal_wrvptptr: Write virtual page table pointer. [PRIVILEGED]
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*
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* Arguments:
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* a0 new virtual page table pointer
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*/
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.text
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LEAF(alpha_pal_wrvptptr,1)
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call_pal PAL_OSF1_wrvptptr
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RET
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END(alpha_pal_wrvptptr)
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/*
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* alpha_pal_wrmces: Write MCES processor register. [PRIVILEGED]
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*
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* Arguments:
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* a0 value to write to MCES
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*/
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.text
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LEAF(alpha_pal_wrmces,1)
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call_pal PAL_OSF1_wrmces
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RET
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END(alpha_pal_wrmces)
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/*
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* alpha_pal_wrval: Write system value. [PRIVILEGED]
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*
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* Write the value passed in a0 to this processor's sysvalue.
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*
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* Arguments:
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* a0 value to write to sysvalue
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*/
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LEAF(alpha_pal_wrval,1)
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call_pal PAL_OSF1_wrval
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RET
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END(alpha_pal_wrval)
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/*
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* alpha_pal_swpctx: Swap context. [PRIVILEGED]
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*
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* Switch to a new process context.
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*
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* Arguments:
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* a0 physical address of hardware PCB describing context
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*
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* Returns:
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* v0 physical address of hardware PCB describing previous context
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*/
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LEAF(alpha_pal_swpctx,1)
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call_pal PAL_OSF1_swpctx
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RET
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END(alpha_pal_swpctx)
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