Neel Natu 2ce1242309 Clear blocking due to STI or MOV SS in the hypervisor when an instruction is ... emulated or when the vcpu incurs an exception. This matches the CPU behavior. Remove special case code in HLT processing that was clearing the interrupt shadow. This is now redundant because the interrupt shadow is always cleared when the vcpu is resumed after an instruction is emulated. Reported by: David Reed (david.reed@tidalscale.com) MFC after: 2 weeks		2015-01-06 19:04:02 +00:00
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acpica	don't set CR4 PSE bit on amd64	2014-07-23 15:53:29 +00:00
amd64	On some Intel CPUs with a P-state but not C-state invariant TSC the TSC	2015-01-05 20:44:44 +00:00
conf	Remove "New" label from NFSCL/NFSD now that they are the only NFS	2015-01-06 16:15:57 +00:00
ia32	Change the way the lcall $7,$0 is reflected to usermode. Instead of	2014-12-27 23:19:08 +00:00
include	For /dev/mem and /dev/kmem accesses, avoid asserting that addresses	2015-01-03 01:28:58 +00:00
linux32	Regen after r276508, r276509.	2015-01-01 18:43:31 +00:00
pci	Pull in r267961 and r267973 again. Fix for issues reported will follow.	2014-06-28 03:56:17 +00:00
vmm	Clear blocking due to STI or MOV SS in the hypervisor when an instruction is	2015-01-06 19:04:02 +00:00
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