6d13fd638c
When processor enters power-save state it releases resources shared with other cpu threads which makes other cores working much faster. This patch also implements saving and restoring registers that might get corrupted in power-save state. Submitted by: Patryk Duda <pdk@semihalf.com> Obtained from: Semihalf Reviewed by: jhibbits, nwhitehorn, wma Sponsored by: IBM, QCM Technologies Differential revision: https://reviews.freebsd.org/D14330
128 lines
4.1 KiB
C
128 lines
4.1 KiB
C
/*-
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* SPDX-License-Identifier: BSD-4-Clause
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*
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* Copyright (C) 1995-1997 Wolfgang Solfrank.
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* Copyright (C) 1995-1997 TooLs GmbH.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by TooLs GmbH.
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* 4. The name of TooLs GmbH may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $NetBSD: cpu.h,v 1.11 2000/05/26 21:19:53 thorpej Exp $
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* $FreeBSD$
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*/
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#ifndef _MACHINE_CPU_H_
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#define _MACHINE_CPU_H_
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#include <machine/frame.h>
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#include <machine/pcb.h>
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#include <machine/psl.h>
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/*
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* CPU Feature Attributes
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*
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* These are defined in the PowerPC ELF ABI for the AT_HWCAP vector,
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* and are exported to userland via the machdep.cpu_features
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* sysctl.
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*/
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extern int cpu_features;
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extern int cpu_features2;
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#define PPC_FEATURE_32 0x80000000 /* Always true */
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#define PPC_FEATURE_64 0x40000000 /* Defined on a 64-bit CPU */
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#define PPC_FEATURE_HAS_ALTIVEC 0x10000000
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#define PPC_FEATURE_HAS_FPU 0x08000000
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#define PPC_FEATURE_HAS_MMU 0x04000000
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#define PPC_FEATURE_UNIFIED_CACHE 0x01000000
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#define PPC_FEATURE_HAS_SPE 0x00800000
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#define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000
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#define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000
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#define PPC_FEATURE_BOOKE 0x00008000
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#define PPC_FEATURE_SMT 0x00004000
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#define PPC_FEATURE_ARCH_2_05 0x00001000
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#define PPC_FEATURE_HAS_DFP 0x00000400
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#define PPC_FEATURE_ARCH_2_06 0x00000100
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#define PPC_FEATURE_HAS_VSX 0x00000080
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#define PPC_FEATURE2_ARCH_2_07 0x80000000
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#define PPC_FEATURE2_HAS_HTM 0x40000000
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#define PPC_FEATURE2_ISEL 0x08000000
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#define PPC_FEATURE2_HAS_VCRYPTO 0x02000000
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#define PPC_FEATURE_BITMASK \
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"\20" \
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"\040PPC32\037PPC64\035ALTIVEC\034FPU\033MMU\031UNIFIEDCACHE" \
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"\030SPE\027SPESFP\026DPESFP\020BOOKE\017SMT\015ARCH205\013DFP" \
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"\011ARCH206\010VSX"
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#define PPC_FEATURE2_BITMASK \
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"\20" \
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"\040ARCH207\037HTM\034ISEL\032VCRYPTO"
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#define TRAPF_USERMODE(frame) (((frame)->srr1 & PSL_PR) != 0)
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#define TRAPF_PC(frame) ((frame)->srr0)
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/*
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* CTL_MACHDEP definitions.
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*/
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#define CPU_CACHELINE 1
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static __inline u_int64_t
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get_cyclecount(void)
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{
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u_int32_t _upper, _lower;
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u_int64_t _time;
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__asm __volatile(
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"mftb %0\n"
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"mftbu %1"
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: "=r" (_lower), "=r" (_upper));
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_time = (u_int64_t)_upper;
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_time = (_time << 32) + _lower;
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return (_time);
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}
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#define cpu_getstack(td) ((td)->td_frame->fixreg[1])
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#define cpu_spinwait() __asm __volatile("or 27,27,27") /* yield */
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extern char btext[];
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extern char etext[];
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#ifdef __powerpc64__
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extern void enter_idle_powerx(void);
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extern uint64_t can_wakeup;
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#endif
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void cpu_halt(void);
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void cpu_reset(void);
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void cpu_sleep(void);
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void flush_disable_caches(void);
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void fork_trampoline(void);
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void swi_vm(void *);
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#endif /* _MACHINE_CPU_H_ */
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