2d4a5bcccb
Its more important for SPI HBAs, as they don't support CDBs above 12 bytes. The new error code makes CAM to fall back to alternative commands. MFC after: 2 weeks
770 lines
22 KiB
C
770 lines
22 KiB
C
/* $FreeBSD$ */
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/*-
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* Qlogic ISP SCSI Host Adapter FreeBSD Wrapper Definitions
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*
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* Copyright (c) 1997-2008 by Matthew Jacob
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _ISP_FREEBSD_H
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#define _ISP_FREEBSD_H
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/endian.h>
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#include <sys/jail.h>
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#include <sys/lock.h>
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#include <sys/kernel.h>
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#include <sys/queue.h>
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#include <sys/malloc.h>
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#include <sys/mutex.h>
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#include <sys/condvar.h>
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#include <sys/rman.h>
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#include <sys/sysctl.h>
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#include <sys/proc.h>
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#include <sys/bus.h>
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#include <sys/taskqueue.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/stdarg.h>
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#include <cam/cam.h>
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#include <cam/cam_debug.h>
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#include <cam/cam_ccb.h>
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#include <cam/cam_sim.h>
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#include <cam/cam_xpt.h>
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#include <cam/cam_xpt_sim.h>
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#include <cam/cam_debug.h>
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#include <cam/scsi/scsi_all.h>
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#include <cam/scsi/scsi_message.h>
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#include "opt_ddb.h"
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#include "opt_isp.h"
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#define ISP_PLATFORM_VERSION_MAJOR 7
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#define ISP_PLATFORM_VERSION_MINOR 10
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/*
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* Efficiency- get rid of SBus code && tests unless we need them.
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*/
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#ifdef __sparc64__
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#define ISP_SBUS_SUPPORTED 1
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#else
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#define ISP_SBUS_SUPPORTED 0
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#endif
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#define ISP_IFLAGS INTR_TYPE_CAM | INTR_ENTROPY | INTR_MPSAFE
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#define N_XCMDS 64
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#define XCMD_SIZE 512
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struct ispsoftc;
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typedef union isp_ecmd {
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union isp_ecmd * next;
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uint8_t data[XCMD_SIZE];
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} isp_ecmd_t;
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isp_ecmd_t * isp_get_ecmd(struct ispsoftc *);
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void isp_put_ecmd(struct ispsoftc *, isp_ecmd_t *);
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#ifdef ISP_TARGET_MODE
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#define ATPDPSIZE 4096
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#define ATPDPHASHSIZE 32
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#define ATPDPHASH(x) ((((x) >> 24) ^ ((x) >> 16) ^ ((x) >> 8) ^ (x)) & \
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((ATPDPHASHSIZE) - 1))
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#include <dev/isp/isp_target.h>
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typedef struct atio_private_data {
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LIST_ENTRY(atio_private_data) next;
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uint32_t orig_datalen;
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uint32_t bytes_xfered;
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uint32_t bytes_in_transit;
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uint32_t tag; /* typically f/w RX_ID */
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lun_id_t lun;
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uint32_t nphdl;
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uint32_t sid;
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uint32_t portid;
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uint16_t rxid; /* wire rxid */
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uint16_t oxid; /* wire oxid */
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uint16_t word3; /* PRLI word3 params */
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uint16_t ctcnt; /* number of CTIOs currently active */
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uint8_t seqno; /* CTIO sequence number */
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uint32_t
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srr_notify_rcvd : 1,
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cdb0 : 8,
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sendst : 1,
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dead : 1,
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tattr : 3,
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state : 3;
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void * ests;
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/*
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* The current SRR notify copy
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*/
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uint8_t srr[64]; /* sb QENTRY_LEN, but order of definitions is wrong */
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void * srr_ccb;
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uint32_t nsrr;
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} atio_private_data_t;
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#define ATPD_STATE_FREE 0
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#define ATPD_STATE_ATIO 1
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#define ATPD_STATE_CAM 2
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#define ATPD_STATE_CTIO 3
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#define ATPD_STATE_LAST_CTIO 4
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#define ATPD_STATE_PDON 5
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#define ATPD_CCB_OUTSTANDING 16
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#define ATPD_SEQ_MASK 0x7f
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#define ATPD_SEQ_NOTIFY_CAM 0x80
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#define ATPD_SET_SEQNO(hdrp, atp) ((isphdr_t *)hdrp)->rqs_seqno &= ~ATPD_SEQ_MASK, ((isphdr_t *)hdrp)->rqs_seqno |= (atp)->seqno
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#define ATPD_GET_SEQNO(hdrp) (((isphdr_t *)hdrp)->rqs_seqno & ATPD_SEQ_MASK)
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#define ATPD_GET_NCAM(hdrp) ((((isphdr_t *)hdrp)->rqs_seqno & ATPD_SEQ_NOTIFY_CAM) != 0)
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typedef struct inot_private_data inot_private_data_t;
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struct inot_private_data {
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STAILQ_ENTRY(inot_private_data) next;
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isp_notify_t nt;
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uint8_t data[64]; /* sb QENTRY_LEN, but order of definitions is wrong */
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uint32_t tag_id, seq_id;
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};
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typedef struct isp_timed_notify_ack {
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void *isp;
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void *not;
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uint8_t data[64]; /* sb QENTRY_LEN, but order of definitions is wrong */
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struct callout timer;
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} isp_tna_t;
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STAILQ_HEAD(ntpdlist, inot_private_data);
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typedef struct tstate {
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SLIST_ENTRY(tstate) next;
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lun_id_t ts_lun;
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struct ccb_hdr_slist atios;
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struct ccb_hdr_slist inots;
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struct ntpdlist restart_queue;
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uint16_t atio_count;
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uint16_t inot_count;
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} tstate_t;
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#define LUN_HASH_SIZE 32
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#define LUN_HASH_FUNC(lun) ((lun) & (LUN_HASH_SIZE - 1))
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#endif
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/*
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* Per command info.
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*/
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struct isp_pcmd {
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struct isp_pcmd * next;
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bus_dmamap_t dmap; /* dma map for this command */
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struct ispsoftc * isp; /* containing isp */
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struct callout wdog; /* watchdog timer */
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uint32_t datalen; /* data length for this command (target mode only) */
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uint8_t totslen; /* sense length on status response */
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uint8_t cumslen; /* sense length on status response */
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uint8_t crn; /* command reference number */
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};
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#define ISP_PCMD(ccb) (ccb)->ccb_h.spriv_ptr1
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#define PISP_PCMD(ccb) ((struct isp_pcmd *)ISP_PCMD(ccb))
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/*
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* Per nexus info.
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*/
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struct isp_nexus {
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uint64_t lun; /* LUN for target */
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uint32_t tgt; /* TGT for target */
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uint8_t crnseed; /* next command reference number */
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struct isp_nexus *next;
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};
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#define NEXUS_HASH_WIDTH 32
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#define INITIAL_NEXUS_COUNT MAX_FC_TARG
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#define NEXUS_HASH(tgt, lun) ((tgt + lun) % NEXUS_HASH_WIDTH)
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/*
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* Per channel information
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*/
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SLIST_HEAD(tslist, tstate);
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TAILQ_HEAD(isp_ccbq, ccb_hdr);
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LIST_HEAD(atpdlist, atio_private_data);
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struct isp_fc {
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struct cam_sim *sim;
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struct cam_path *path;
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struct ispsoftc *isp;
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struct proc *kproc;
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bus_dmamap_t scmap;
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uint64_t def_wwpn;
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uint64_t def_wwnn;
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time_t loop_down_time;
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int loop_down_limit;
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int gone_device_time;
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/*
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* Per target/lun info- just to keep a per-ITL nexus crn count
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*/
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struct isp_nexus *nexus_hash[NEXUS_HASH_WIDTH];
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struct isp_nexus *nexus_free_list;
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uint32_t
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simqfrozen : 3,
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default_id : 8,
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def_role : 2, /* default role */
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gdt_running : 1,
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loop_dead : 1,
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loop_seen_once : 1,
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fcbsy : 1,
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ready : 1;
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struct callout gdt; /* gone device timer */
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struct task gtask;
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#ifdef ISP_TARGET_MODE
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struct tslist lun_hash[LUN_HASH_SIZE];
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struct isp_ccbq waitq; /* waiting CCBs */
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struct ntpdlist ntfree;
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inot_private_data_t ntpool[ATPDPSIZE];
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struct atpdlist atfree;
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struct atpdlist atused[ATPDPHASHSIZE];
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atio_private_data_t atpool[ATPDPSIZE];
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#if defined(DEBUG)
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unsigned int inject_lost_data_frame;
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#endif
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#endif
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int num_threads;
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};
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struct isp_spi {
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struct cam_sim *sim;
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struct cam_path *path;
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uint32_t
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simqfrozen : 3,
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iid : 4;
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#ifdef ISP_TARGET_MODE
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struct tslist lun_hash[LUN_HASH_SIZE];
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struct isp_ccbq waitq; /* waiting CCBs */
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struct ntpdlist ntfree;
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inot_private_data_t ntpool[ATPDPSIZE];
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struct atpdlist atfree;
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struct atpdlist atused[ATPDPHASHSIZE];
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atio_private_data_t atpool[ATPDPSIZE];
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#endif
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int num_threads;
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};
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struct isposinfo {
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/*
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* Linkage, locking, and identity
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*/
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struct mtx lock;
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device_t dev;
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struct cdev * cdev;
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struct intr_config_hook ehook;
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struct cam_devq * devq;
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/*
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* Firmware pointer
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*/
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const struct firmware * fw;
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/*
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* DMA related stuff
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*/
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struct resource * regs;
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struct resource * regs2;
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bus_dma_tag_t dmat;
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bus_dma_tag_t reqdmat;
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bus_dma_tag_t respdmat;
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bus_dma_tag_t atiodmat;
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bus_dma_tag_t iocbdmat;
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bus_dma_tag_t scdmat;
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bus_dmamap_t reqmap;
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bus_dmamap_t respmap;
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bus_dmamap_t atiomap;
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bus_dmamap_t iocbmap;
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/*
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* Command and transaction related related stuff
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*/
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struct isp_pcmd * pcmd_pool;
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struct isp_pcmd * pcmd_free;
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uint32_t
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#ifdef ISP_TARGET_MODE
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tmwanted : 1,
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tmbusy : 1,
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#else
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: 2,
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#endif
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sixtyfourbit : 1, /* sixtyfour bit platform */
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timer_active : 1,
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autoconf : 1,
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ehook_active : 1,
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mbox_sleeping : 1,
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mbox_sleep_ok : 1,
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mboxcmd_done : 1,
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mboxbsy : 1;
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struct callout tmo; /* general timer */
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/*
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* misc- needs to be sorted better XXXXXX
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*/
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int framesize;
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int exec_throttle;
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int cont_max;
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bus_addr_t ecmd_dma;
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isp_ecmd_t * ecmd_base;
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isp_ecmd_t * ecmd_free;
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/*
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* Per-type private storage...
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*/
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union {
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struct isp_fc *fc;
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struct isp_spi *spi;
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void *ptr;
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} pc;
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int is_exiting;
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};
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#define ISP_FC_PC(isp, chan) (&(isp)->isp_osinfo.pc.fc[(chan)])
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#define ISP_SPI_PC(isp, chan) (&(isp)->isp_osinfo.pc.spi[(chan)])
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#define ISP_GET_PC(isp, chan, tag, rslt) \
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if (IS_SCSI(isp)) { \
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rslt = ISP_SPI_PC(isp, chan)-> tag; \
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} else { \
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rslt = ISP_FC_PC(isp, chan)-> tag; \
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}
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#define ISP_GET_PC_ADDR(isp, chan, tag, rp) \
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if (IS_SCSI(isp)) { \
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rp = &ISP_SPI_PC(isp, chan)-> tag; \
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} else { \
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rp = &ISP_FC_PC(isp, chan)-> tag; \
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}
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#define ISP_SET_PC(isp, chan, tag, val) \
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if (IS_SCSI(isp)) { \
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ISP_SPI_PC(isp, chan)-> tag = val; \
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} else { \
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ISP_FC_PC(isp, chan)-> tag = val; \
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}
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#define FCP_NEXT_CRN isp_fcp_next_crn
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#define isp_lock isp_osinfo.lock
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#define isp_regs isp_osinfo.regs
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#define isp_regs2 isp_osinfo.regs2
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/*
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* Locking macros...
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*/
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#define ISP_LOCK(isp) mtx_lock(&(isp)->isp_osinfo.lock)
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#define ISP_UNLOCK(isp) mtx_unlock(&(isp)->isp_osinfo.lock)
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#define ISP_ASSERT_LOCKED(isp) mtx_assert(&(isp)->isp_osinfo.lock, MA_OWNED)
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/*
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* Required Macros/Defines
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*/
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#define ISP_FC_SCRLEN 0x1000
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#define ISP_MEMZERO(a, b) memset(a, 0, b)
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#define ISP_MEMCPY memcpy
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#define ISP_SNPRINTF snprintf
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#define ISP_DELAY(x) DELAY(x)
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#if __FreeBSD_version < 1000029
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#define ISP_SLEEP(isp, x) msleep(&(isp)->isp_osinfo.is_exiting, \
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&(isp)->isp_osinfo.lock, 0, "isp_sleep", ((x) + tick - 1) / tick)
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#else
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#define ISP_SLEEP(isp, x) msleep_sbt(&(isp)->isp_osinfo.is_exiting, \
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&(isp)->isp_osinfo.lock, 0, "isp_sleep", (x) * SBT_1US, 0, 0)
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#endif
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#define ISP_MIN imin
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#ifndef DIAGNOSTIC
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#define ISP_INLINE __inline
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#else
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#define ISP_INLINE
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#endif
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#define NANOTIME_T struct timespec
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#define GET_NANOTIME nanotime
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#define GET_NANOSEC(x) ((x)->tv_sec * 1000000000 + (x)->tv_nsec)
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#define NANOTIME_SUB isp_nanotime_sub
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#define MAXISPREQUEST(isp) ((IS_FC(isp) || IS_ULTRA2(isp))? 1024 : 256)
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#define MEMORYBARRIER(isp, type, offset, size, chan) \
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switch (type) { \
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case SYNC_REQUEST: \
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bus_dmamap_sync(isp->isp_osinfo.reqdmat, \
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isp->isp_osinfo.reqmap, BUS_DMASYNC_PREWRITE); \
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break; \
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case SYNC_RESULT: \
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bus_dmamap_sync(isp->isp_osinfo.respdmat, \
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isp->isp_osinfo.respmap, BUS_DMASYNC_POSTREAD); \
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break; \
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case SYNC_SFORDEV: \
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{ \
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struct isp_fc *fc = ISP_FC_PC(isp, chan); \
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bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap, \
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BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); \
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break; \
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} \
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case SYNC_SFORCPU: \
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{ \
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struct isp_fc *fc = ISP_FC_PC(isp, chan); \
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bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap, \
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BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); \
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break; \
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} \
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case SYNC_REG: \
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bus_barrier(isp->isp_osinfo.regs, offset, size, \
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BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); \
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break; \
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case SYNC_ATIOQ: \
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bus_dmamap_sync(isp->isp_osinfo.atiodmat, \
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isp->isp_osinfo.atiomap, BUS_DMASYNC_POSTREAD); \
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break; \
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case SYNC_IFORDEV: \
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bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \
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BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); \
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break; \
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case SYNC_IFORCPU: \
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bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \
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BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); \
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break; \
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default: \
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break; \
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}
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#define MEMORYBARRIERW(isp, type, offset, size, chan) \
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switch (type) { \
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case SYNC_REQUEST: \
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bus_dmamap_sync(isp->isp_osinfo.reqdmat, \
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isp->isp_osinfo.reqmap, BUS_DMASYNC_PREWRITE); \
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break; \
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case SYNC_SFORDEV: \
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{ \
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struct isp_fc *fc = ISP_FC_PC(isp, chan); \
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bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap, \
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BUS_DMASYNC_PREWRITE); \
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break; \
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} \
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case SYNC_SFORCPU: \
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{ \
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struct isp_fc *fc = ISP_FC_PC(isp, chan); \
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bus_dmamap_sync(isp->isp_osinfo.scdmat, fc->scmap, \
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BUS_DMASYNC_POSTWRITE); \
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break; \
|
|
} \
|
|
case SYNC_REG: \
|
|
bus_barrier(isp->isp_osinfo.regs, offset, size, \
|
|
BUS_SPACE_BARRIER_WRITE); \
|
|
break; \
|
|
case SYNC_IFORDEV: \
|
|
bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \
|
|
BUS_DMASYNC_PREWRITE); \
|
|
break; \
|
|
case SYNC_IFORCPU: \
|
|
bus_dmamap_sync(isp->isp_osinfo.iocbdmat, isp->isp_osinfo.iocbmap, \
|
|
BUS_DMASYNC_POSTWRITE); \
|
|
break; \
|
|
default: \
|
|
break; \
|
|
}
|
|
|
|
#define MBOX_ACQUIRE isp_mbox_acquire
|
|
#define MBOX_WAIT_COMPLETE isp_mbox_wait_complete
|
|
#define MBOX_NOTIFY_COMPLETE isp_mbox_notify_done
|
|
#define MBOX_RELEASE isp_mbox_release
|
|
|
|
#define FC_SCRATCH_ACQUIRE isp_fc_scratch_acquire
|
|
#define FC_SCRATCH_RELEASE(isp, chan) isp->isp_osinfo.pc.fc[chan].fcbsy = 0
|
|
|
|
#ifndef SCSI_GOOD
|
|
#define SCSI_GOOD SCSI_STATUS_OK
|
|
#endif
|
|
#ifndef SCSI_CHECK
|
|
#define SCSI_CHECK SCSI_STATUS_CHECK_COND
|
|
#endif
|
|
#ifndef SCSI_BUSY
|
|
#define SCSI_BUSY SCSI_STATUS_BUSY
|
|
#endif
|
|
#ifndef SCSI_QFULL
|
|
#define SCSI_QFULL SCSI_STATUS_QUEUE_FULL
|
|
#endif
|
|
|
|
#define XS_T struct ccb_scsiio
|
|
#define XS_DMA_ADDR_T bus_addr_t
|
|
#define XS_GET_DMA64_SEG(a, b, c) \
|
|
{ \
|
|
ispds64_t *d = a; \
|
|
bus_dma_segment_t *e = b; \
|
|
uint32_t f = c; \
|
|
e += f; \
|
|
d->ds_base = DMA_LO32(e->ds_addr); \
|
|
d->ds_basehi = DMA_HI32(e->ds_addr); \
|
|
d->ds_count = e->ds_len; \
|
|
}
|
|
#define XS_GET_DMA_SEG(a, b, c) \
|
|
{ \
|
|
ispds_t *d = a; \
|
|
bus_dma_segment_t *e = b; \
|
|
uint32_t f = c; \
|
|
e += f; \
|
|
d->ds_base = DMA_LO32(e->ds_addr); \
|
|
d->ds_count = e->ds_len; \
|
|
}
|
|
#define XS_ISP(ccb) cam_sim_softc(xpt_path_sim((ccb)->ccb_h.path))
|
|
#define XS_CHANNEL(ccb) cam_sim_bus(xpt_path_sim((ccb)->ccb_h.path))
|
|
#define XS_TGT(ccb) (ccb)->ccb_h.target_id
|
|
#define XS_LUN(ccb) (ccb)->ccb_h.target_lun
|
|
|
|
#define XS_CDBP(ccb) \
|
|
(((ccb)->ccb_h.flags & CAM_CDB_POINTER)? \
|
|
(ccb)->cdb_io.cdb_ptr : (ccb)->cdb_io.cdb_bytes)
|
|
|
|
#define XS_CDBLEN(ccb) (ccb)->cdb_len
|
|
#define XS_XFRLEN(ccb) (ccb)->dxfer_len
|
|
#define XS_TIME(ccb) (ccb)->ccb_h.timeout
|
|
#define XS_GET_RESID(ccb) (ccb)->resid
|
|
#define XS_SET_RESID(ccb, r) (ccb)->resid = r
|
|
#define XS_STSP(ccb) (&(ccb)->scsi_status)
|
|
#define XS_SNSP(ccb) (&(ccb)->sense_data)
|
|
|
|
#define XS_TOT_SNSLEN(ccb) ccb->sense_len
|
|
#define XS_CUR_SNSLEN(ccb) (ccb->sense_len - ccb->sense_resid)
|
|
|
|
#define XS_SNSKEY(ccb) (scsi_get_sense_key(&(ccb)->sense_data, \
|
|
ccb->sense_len - ccb->sense_resid, 1))
|
|
|
|
#define XS_SNSASC(ccb) (scsi_get_asc(&(ccb)->sense_data, \
|
|
ccb->sense_len - ccb->sense_resid, 1))
|
|
|
|
#define XS_SNSASCQ(ccb) (scsi_get_ascq(&(ccb)->sense_data, \
|
|
ccb->sense_len - ccb->sense_resid, 1))
|
|
#define XS_TAG_P(ccb) \
|
|
(((ccb)->ccb_h.flags & CAM_TAG_ACTION_VALID) && \
|
|
(ccb)->tag_action != CAM_TAG_ACTION_NONE)
|
|
|
|
#define XS_TAG_TYPE(ccb) \
|
|
((ccb->tag_action == MSG_SIMPLE_Q_TAG)? REQFLAG_STAG : \
|
|
((ccb->tag_action == MSG_HEAD_OF_Q_TAG)? REQFLAG_HTAG : REQFLAG_OTAG))
|
|
|
|
|
|
#define XS_SETERR(ccb, v) (ccb)->ccb_h.status &= ~CAM_STATUS_MASK, \
|
|
(ccb)->ccb_h.status |= v
|
|
|
|
# define HBA_NOERROR CAM_REQ_INPROG
|
|
# define HBA_BOTCH CAM_UNREC_HBA_ERROR
|
|
# define HBA_CMDTIMEOUT CAM_CMD_TIMEOUT
|
|
# define HBA_SELTIMEOUT CAM_SEL_TIMEOUT
|
|
# define HBA_TGTBSY CAM_SCSI_STATUS_ERROR
|
|
# define HBA_REQINVAL CAM_REQ_INVALID
|
|
# define HBA_BUSRESET CAM_SCSI_BUS_RESET
|
|
# define HBA_ABORTED CAM_REQ_ABORTED
|
|
# define HBA_DATAOVR CAM_DATA_RUN_ERR
|
|
# define HBA_ARQFAIL CAM_AUTOSENSE_FAIL
|
|
|
|
|
|
#define XS_ERR(ccb) ((ccb)->ccb_h.status & CAM_STATUS_MASK)
|
|
|
|
#define XS_NOERR(ccb) (((ccb)->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG)
|
|
|
|
#define XS_INITERR(ccb) XS_SETERR(ccb, CAM_REQ_INPROG), ccb->sense_resid = ccb->sense_len
|
|
|
|
#define XS_SAVE_SENSE(xs, sense_ptr, totslen, slen) do { \
|
|
uint32_t tlen = slen; \
|
|
if (tlen > (xs)->sense_len) \
|
|
tlen = (xs)->sense_len; \
|
|
PISP_PCMD(xs)->totslen = imin((xs)->sense_len, totslen); \
|
|
PISP_PCMD(xs)->cumslen = tlen; \
|
|
memcpy(&(xs)->sense_data, sense_ptr, tlen); \
|
|
(xs)->sense_resid = (xs)->sense_len - tlen; \
|
|
(xs)->ccb_h.status |= CAM_AUTOSNS_VALID; \
|
|
} while (0)
|
|
|
|
#define XS_SENSE_APPEND(xs, xsnsp, xsnsl) do { \
|
|
uint32_t off = PISP_PCMD(xs)->cumslen; \
|
|
uint8_t *ptr = &((uint8_t *)(&(xs)->sense_data))[off]; \
|
|
uint32_t amt = imin(xsnsl, PISP_PCMD(xs)->totslen - off); \
|
|
if (amt) { \
|
|
memcpy(ptr, xsnsp, amt); \
|
|
(xs)->sense_resid -= amt; \
|
|
PISP_PCMD(xs)->cumslen += amt; \
|
|
} \
|
|
} while (0)
|
|
|
|
#define XS_SENSE_VALID(xs) (((xs)->ccb_h.status & CAM_AUTOSNS_VALID) != 0)
|
|
|
|
#define DEFAULT_FRAMESIZE(isp) isp->isp_osinfo.framesize
|
|
#define DEFAULT_EXEC_THROTTLE(isp) isp->isp_osinfo.exec_throttle
|
|
|
|
#define DEFAULT_ROLE(isp, chan) \
|
|
(IS_FC(isp)? ISP_FC_PC(isp, chan)->def_role : ISP_ROLE_INITIATOR)
|
|
|
|
#define DEFAULT_IID(isp, chan) isp->isp_osinfo.pc.spi[chan].iid
|
|
|
|
#define DEFAULT_LOOPID(x, chan) isp->isp_osinfo.pc.fc[chan].default_id
|
|
|
|
#define DEFAULT_NODEWWN(isp, chan) isp_default_wwn(isp, chan, 0, 1)
|
|
#define DEFAULT_PORTWWN(isp, chan) isp_default_wwn(isp, chan, 0, 0)
|
|
#define ACTIVE_NODEWWN(isp, chan) isp_default_wwn(isp, chan, 1, 1)
|
|
#define ACTIVE_PORTWWN(isp, chan) isp_default_wwn(isp, chan, 1, 0)
|
|
|
|
|
|
#if BYTE_ORDER == BIG_ENDIAN
|
|
#ifdef ISP_SBUS_SUPPORTED
|
|
#define ISP_IOXPUT_8(isp, s, d) *(d) = s
|
|
#define ISP_IOXPUT_16(isp, s, d) \
|
|
*(d) = (isp->isp_bustype == ISP_BT_SBUS)? s : bswap16(s)
|
|
#define ISP_IOXPUT_32(isp, s, d) \
|
|
*(d) = (isp->isp_bustype == ISP_BT_SBUS)? s : bswap32(s)
|
|
#define ISP_IOXGET_8(isp, s, d) d = (*((uint8_t *)s))
|
|
#define ISP_IOXGET_16(isp, s, d) \
|
|
d = (isp->isp_bustype == ISP_BT_SBUS)? \
|
|
*((uint16_t *)s) : bswap16(*((uint16_t *)s))
|
|
#define ISP_IOXGET_32(isp, s, d) \
|
|
d = (isp->isp_bustype == ISP_BT_SBUS)? \
|
|
*((uint32_t *)s) : bswap32(*((uint32_t *)s))
|
|
|
|
#else /* ISP_SBUS_SUPPORTED */
|
|
#define ISP_IOXPUT_8(isp, s, d) *(d) = s
|
|
#define ISP_IOXPUT_16(isp, s, d) *(d) = bswap16(s)
|
|
#define ISP_IOXPUT_32(isp, s, d) *(d) = bswap32(s)
|
|
#define ISP_IOXGET_8(isp, s, d) d = (*((uint8_t *)s))
|
|
#define ISP_IOXGET_16(isp, s, d) d = bswap16(*((uint16_t *)s))
|
|
#define ISP_IOXGET_32(isp, s, d) d = bswap32(*((uint32_t *)s))
|
|
#endif
|
|
#define ISP_SWIZZLE_NVRAM_WORD(isp, rp) *rp = bswap16(*rp)
|
|
#define ISP_SWIZZLE_NVRAM_LONG(isp, rp) *rp = bswap32(*rp)
|
|
|
|
#define ISP_IOZGET_8(isp, s, d) d = (*((uint8_t *)s))
|
|
#define ISP_IOZGET_16(isp, s, d) d = (*((uint16_t *)s))
|
|
#define ISP_IOZGET_32(isp, s, d) d = (*((uint32_t *)s))
|
|
#define ISP_IOZPUT_8(isp, s, d) *(d) = s
|
|
#define ISP_IOZPUT_16(isp, s, d) *(d) = s
|
|
#define ISP_IOZPUT_32(isp, s, d) *(d) = s
|
|
|
|
|
|
#else
|
|
#define ISP_IOXPUT_8(isp, s, d) *(d) = s
|
|
#define ISP_IOXPUT_16(isp, s, d) *(d) = s
|
|
#define ISP_IOXPUT_32(isp, s, d) *(d) = s
|
|
#define ISP_IOXGET_8(isp, s, d) d = *(s)
|
|
#define ISP_IOXGET_16(isp, s, d) d = *(s)
|
|
#define ISP_IOXGET_32(isp, s, d) d = *(s)
|
|
#define ISP_SWIZZLE_NVRAM_WORD(isp, rp)
|
|
#define ISP_SWIZZLE_NVRAM_LONG(isp, rp)
|
|
|
|
#define ISP_IOZPUT_8(isp, s, d) *(d) = s
|
|
#define ISP_IOZPUT_16(isp, s, d) *(d) = bswap16(s)
|
|
#define ISP_IOZPUT_32(isp, s, d) *(d) = bswap32(s)
|
|
|
|
#define ISP_IOZGET_8(isp, s, d) d = (*((uint8_t *)(s)))
|
|
#define ISP_IOZGET_16(isp, s, d) d = bswap16(*((uint16_t *)(s)))
|
|
#define ISP_IOZGET_32(isp, s, d) d = bswap32(*((uint32_t *)(s)))
|
|
|
|
#endif
|
|
|
|
#define ISP_SWAP16(isp, s) bswap16(s)
|
|
#define ISP_SWAP32(isp, s) bswap32(s)
|
|
|
|
/*
|
|
* Includes of common header files
|
|
*/
|
|
|
|
#include <dev/isp/ispreg.h>
|
|
#include <dev/isp/ispvar.h>
|
|
#include <dev/isp/ispmbox.h>
|
|
|
|
/*
|
|
* isp_osinfo definiitions && shorthand
|
|
*/
|
|
#define SIMQFRZ_RESOURCE 0x1
|
|
#define SIMQFRZ_LOOPDOWN 0x2
|
|
#define SIMQFRZ_TIMED 0x4
|
|
|
|
#define isp_dev isp_osinfo.dev
|
|
|
|
/*
|
|
* prototypes for isp_pci && isp_freebsd to share
|
|
*/
|
|
extern int isp_attach(ispsoftc_t *);
|
|
extern int isp_detach(ispsoftc_t *);
|
|
extern void isp_uninit(ispsoftc_t *);
|
|
extern uint64_t isp_default_wwn(ispsoftc_t *, int, int, int);
|
|
|
|
/*
|
|
* driver global data
|
|
*/
|
|
extern int isp_announced;
|
|
extern int isp_loop_down_limit;
|
|
extern int isp_gone_device_time;
|
|
extern int isp_quickboot_time;
|
|
|
|
/*
|
|
* Platform private flags
|
|
*/
|
|
|
|
/*
|
|
* Platform Library Functions
|
|
*/
|
|
void isp_prt(ispsoftc_t *, int level, const char *, ...) __printflike(3, 4);
|
|
void isp_xs_prt(ispsoftc_t *, XS_T *, int level, const char *, ...) __printflike(4, 5);
|
|
uint64_t isp_nanotime_sub(struct timespec *, struct timespec *);
|
|
int isp_mbox_acquire(ispsoftc_t *);
|
|
void isp_mbox_wait_complete(ispsoftc_t *, mbreg_t *);
|
|
void isp_mbox_notify_done(ispsoftc_t *);
|
|
void isp_mbox_release(ispsoftc_t *);
|
|
int isp_fc_scratch_acquire(ispsoftc_t *, int);
|
|
int isp_mstohz(int);
|
|
void isp_platform_intr(void *);
|
|
void isp_common_dmateardown(ispsoftc_t *, struct ccb_scsiio *, uint32_t);
|
|
void isp_fcp_reset_crn(ispsoftc_t *, int, uint32_t, int);
|
|
int isp_fcp_next_crn(ispsoftc_t *, uint8_t *, XS_T *);
|
|
|
|
/*
|
|
* Platform Version specific defines
|
|
*/
|
|
#define BUS_DMA_ROOTARG(x) bus_get_dma_tag(x)
|
|
#define isp_dma_tag_create(a, b, c, d, e, f, g, h, i, j, k, z) \
|
|
bus_dma_tag_create(a, b, c, d, e, f, g, h, i, j, k, \
|
|
busdma_lock_mutex, &isp->isp_osinfo.lock, z)
|
|
|
|
#define isp_setup_intr bus_setup_intr
|
|
|
|
#define isp_sim_alloc(a, b, c, d, e, f, g, h) \
|
|
cam_sim_alloc(a, b, c, d, e, &(d)->isp_osinfo.lock, f, g, h)
|
|
|
|
#define ISP_PATH_PRT(i, l, p, ...) \
|
|
if ((l) == ISP_LOGALL || ((l)& (i)->isp_dblev) != 0) { \
|
|
xpt_print(p, __VA_ARGS__); \
|
|
}
|
|
|
|
/*
|
|
* Platform specific inline functions
|
|
*/
|
|
|
|
/*
|
|
* ISP General Library functions
|
|
*/
|
|
|
|
#include <dev/isp/isp_library.h>
|
|
|
|
#endif /* _ISP_FREEBSD_H */
|