dfb5178f9b
This revision introduces basic support for the internal ESW switch found Ralink/Mediatek SoCs such as RT3050, RT3352, RT5350, MT7628; and GSW found in MT7620 and MT7621. It only supports 802.1q VLANs and doesn't support external PHYs at the moment (only the ones that are built into the switch itself). Approved by: adrian (mentor) Sponsored by: Smartcom - Bulgaria AD Differential Revision: https://reviews.freebsd.org/D6348
89 lines
3.0 KiB
C
89 lines
3.0 KiB
C
/*-
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* Copyright (c) 2016 Stanislav Galabov.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef __MTKSWITCH_RT3050_H__
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#define __MTKSWITCH_RT3050_H__
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#define MTKSWITCH_PVID(p) ((((p) >> 1) * 4) + 0x40)
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#define PVID_OFF(p) (((p) & 1) ? 12 : 0)
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#define PVID_MASK 0xfff
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#define MTKSWITCH_VLANI(v) ((((v) >> 1) * 4) + 0x50)
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#define VLANI_OFF(v) (((v) & 1) ? 12 : 0)
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#define VLANI_MASK 0xfff
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#define MTKSWITCH_VMSC(x) ((((x) >> 2) * 4) + 0x70)
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#define VMSC_OFF(x) ((x & 3) * 8)
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#define VMSC_MASK 0xff
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#define MTKSWITCH_POA 0x0080
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#define POA_PRT_DPX(x) ((1<<9)<<(x))
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#define POA_FE_SPEED(x) ((1<<0)<<(x))
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#define POA_GE_SPEED(v, x) ((((v)>>5)>>(((x)-5)*2)) & 0x3)
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#define POA_FE_XFC(x) ((1<<16)<<(x))
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#define POA_GE_XFC(v, x) ((((v)>>21)>>(((x)-5)*2)) & 0x3)
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#define POA_PRT_LINK(x) ((1<<25)<<(x))
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#define POA_GE_XFC_TX_MSK 0x2
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#define POA_GE_XFC_RX_MSK 0x1
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#define POA_GE_SPEED_10 0x0
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#define POA_GE_SPEED_100 0x1
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#define POA_GE_SPEED_1000 0x2
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#define MTKSWITCH_FPA 0x0084
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#define FPA_ALL_AUTO 0x00000000
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#define MTKSWITCH_POC2 0x0098
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#define POC2_UNTAG_PORT(x) (1 << (x))
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#define POC2_UNTAG_VLAN (1 << 15)
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#define MTKSWITCH_STRT 0x00a0
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#define STRT_RESET 0xffffffff
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#define MTKSWITCH_PCR0 0x00c0
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#define PCR0_WRITE (1<<13)
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#define PCR0_READ (1<<14)
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#define PCR0_ACTIVE (PCR0_WRITE | PCR0_READ)
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#define PCR0_REG(x) (((x) & 0x1f) << 8)
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#define PCR0_PHY(x) ((x) & 0x1f)
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#define PCR0_DATA(x) (((x) & 0xffff) << 16)
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#define MTKSWITCH_PCR1 0x00c4
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#define PCR1_DATA_OFF 16
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#define PCR1_DATA_MASK 0xffff
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#define MTKSWITCH_SGC2 0x00e4
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#define SGC2_DOUBLE_TAG_PORT(x) (1 << (x))
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#define MTKSWITCH_VUB(x) ((((x) >> 2) * 4) + 0x100)
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#define VUB_OFF(x) ((x & 3) * 7)
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#define VUB_MASK 0x7f
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#define MTKSWITCH_PORT_IS_100M(x) ((x) < 5)
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#endif /* __MTKSWITCH_RT3050_H__ */
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