252 lines
7.3 KiB
ArmAsm
252 lines
7.3 KiB
ArmAsm
.file "wm_shrx.S"
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/*
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* wm_shrx.S
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*
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* 64 bit right shift functions
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*
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* Call from C as:
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* unsigned shrx(void *arg1, unsigned arg2)
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* and
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* unsigned shrxs(void *arg1, unsigned arg2)
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*
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*
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* Copyright (C) 1992, 1993 W. Metzenthen, 22 Parker St, Ormond,
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* Vic 3163, Australia.
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* E-mail apm233m@vaxc.cc.monash.edu.au
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* All rights reserved.
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*
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* This copyright notice covers the redistribution and use of the
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* FPU emulator developed by W. Metzenthen. It covers only its use
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* in the 386BSD operating system. Any other use is not permitted
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* under this copyright.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must include information specifying
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* that source code for the emulator is freely available and include
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* either:
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* a) an offer to provide the source code for a nominal distribution
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* fee, or
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* b) list at least two alternative methods whereby the source
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* can be obtained, e.g. a publically accessible bulletin board
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* and an anonymous ftp site from which the software can be
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* downloaded.
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* 3. All advertising materials specifically mentioning features or use of
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* this emulator must acknowledge that it was developed by W. Metzenthen.
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* 4. The name of W. Metzenthen may not be used to endorse or promote
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* products derived from this software without specific prior written
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* permission.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* W. METZENTHEN BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*
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* $Id:$
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*
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*/
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#include "fpu_asm.h"
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.text
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.align 2,144
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/*---------------------------------------------------------------------------+
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| unsigned shrx(void *arg1, unsigned arg2) |
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| |
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| Extended shift right function. |
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| Fastest for small shifts. |
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| Shifts the 64 bit quantity pointed to by the first arg (arg1) |
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| right by the number of bits specified by the second arg (arg2). |
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| Forms a 96 bit quantity from the 64 bit arg and eax: |
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| [ 64 bit arg ][ eax ] |
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| shift right ---------> |
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| The eax register is initialized to 0 before the shifting. |
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| Results returned in the 64 bit arg and eax. |
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+---------------------------------------------------------------------------*/
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.globl _shrx
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_shrx:
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push %ebp
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movl %esp,%ebp
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pushl %esi
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movl PARAM2,%ecx
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movl PARAM1,%esi
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cmpl $32,%ecx /* shrd only works for 0..31 bits */
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jnc L_more_than_31
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/* less than 32 bits */
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pushl %ebx
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movl (%esi),%ebx /* lsl */
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movl 4(%esi),%edx /* msl */
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xorl %eax,%eax /* extension */
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shrd %cl,%ebx,%eax
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shrd %cl,%edx,%ebx
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shr %cl,%edx
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movl %ebx,(%esi)
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movl %edx,4(%esi)
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popl %ebx
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popl %esi
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leave
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ret
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L_more_than_31:
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cmpl $64,%ecx
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jnc L_more_than_63
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subb $32,%cl
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movl (%esi),%eax /* lsl */
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movl 4(%esi),%edx /* msl */
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shrd %cl,%edx,%eax
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shr %cl,%edx
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movl %edx,(%esi)
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movl $0,4(%esi)
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popl %esi
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leave
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ret
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L_more_than_63:
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cmpl $96,%ecx
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jnc L_more_than_95
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subb $64,%cl
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movl 4(%esi),%eax /* msl */
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shr %cl,%eax
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xorl %edx,%edx
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movl %edx,(%esi)
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movl %edx,4(%esi)
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popl %esi
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leave
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ret
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L_more_than_95:
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xorl %eax,%eax
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movl %eax,(%esi)
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movl %eax,4(%esi)
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popl %esi
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leave
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ret
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/*---------------------------------------------------------------------------+
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| unsigned shrxs(void *arg1, unsigned arg2) |
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| |
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| Extended shift right function (optimized for small floating point |
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| integers). |
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| Shifts the 64 bit quantity pointed to by the first arg (arg1) |
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| right by the number of bits specified by the second arg (arg2). |
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| Forms a 96 bit quantity from the 64 bit arg and eax: |
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| [ 64 bit arg ][ eax ] |
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| shift right ---------> |
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| The eax register is initialized to 0 before the shifting. |
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| The lower 8 bits of eax are lost and replaced by a flag which is |
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| set (to 0x01) if any bit, apart from the first one, is set in the |
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| part which has been shifted out of the arg. |
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| Results returned in the 64 bit arg and eax. |
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+---------------------------------------------------------------------------*/
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.globl _shrxs
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_shrxs:
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push %ebp
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movl %esp,%ebp
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pushl %esi
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pushl %ebx
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movl PARAM2,%ecx
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movl PARAM1,%esi
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cmpl $64,%ecx /* shrd only works for 0..31 bits */
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jnc Ls_more_than_63
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cmpl $32,%ecx /* shrd only works for 0..31 bits */
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jc Ls_less_than_32
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/* We got here without jumps by assuming that the most common requirement
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is for small integers */
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/* Shift by [32..63] bits */
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subb $32,%cl
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movl (%esi),%eax /* lsl */
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movl 4(%esi),%edx /* msl */
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xorl %ebx,%ebx
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shrd %cl,%eax,%ebx
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shrd %cl,%edx,%eax
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shr %cl,%edx
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orl %ebx,%ebx /* test these 32 bits */
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setne %bl
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test $0x7fffffff,%eax /* and 31 bits here */
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setne %bh
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orw %bx,%bx /* Any of the 63 bit set ? */
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setne %al
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movl %edx,(%esi)
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movl $0,4(%esi)
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popl %ebx
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popl %esi
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leave
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ret
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/* Shift by [0..31] bits */
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Ls_less_than_32:
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movl (%esi),%ebx /* lsl */
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movl 4(%esi),%edx /* msl */
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xorl %eax,%eax /* extension */
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shrd %cl,%ebx,%eax
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shrd %cl,%edx,%ebx
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shr %cl,%edx
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test $0x7fffffff,%eax /* only need to look at eax here */
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setne %al
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movl %ebx,(%esi)
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movl %edx,4(%esi)
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popl %ebx
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popl %esi
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leave
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ret
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/* Shift by [64..95] bits */
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Ls_more_than_63:
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cmpl $96,%ecx
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jnc Ls_more_than_95
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subb $64,%cl
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movl (%esi),%ebx /* lsl */
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movl 4(%esi),%eax /* msl */
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xorl %edx,%edx /* extension */
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shrd %cl,%ebx,%edx
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shrd %cl,%eax,%ebx
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shr %cl,%eax
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orl %ebx,%edx
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setne %bl
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test $0x7fffffff,%eax /* only need to look at eax here */
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setne %bh
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orw %bx,%bx
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setne %al
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xorl %edx,%edx
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movl %edx,(%esi) /* set to zero */
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movl %edx,4(%esi) /* set to zero */
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popl %ebx
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popl %esi
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leave
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ret
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Ls_more_than_95:
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/* Shift by [96..inf) bits */
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xorl %eax,%eax
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movl (%esi),%ebx
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orl 4(%esi),%ebx
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setne %al
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xorl %ebx,%ebx
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movl %ebx,(%esi)
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movl %ebx,4(%esi)
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popl %ebx
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popl %esi
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leave
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ret
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