John Baldwin 1931cf940a - Heavyweight interrupt threads on the alpha for device I/O interrupts. ... - Make softinterrupts (SWI's) almost completely MI, and divorce them completely from the x86 hardware interrupt code. - The ihandlers array is now gone. Instead, there is a MI shandlers array that just contains SWI handlers. - Most of the former machine/ipl.h files have moved to a new sys/ipl.h. - Stub out all the spl*() functions on all architectures. Submitted by: dfr		2000-10-05 23:09:57 +00:00
..
alphapci_if.m
apecs_pci.c	Introduce explicit break statements in the various chipsets'	2000-08-31 16:19:27 +00:00
apecs.c	- Heavyweight interrupt threads on the alpha for device I/O interrupts.	2000-10-05 23:09:57 +00:00
apecsreg.h
apecsvar.h
bwx.c
cia_pci.c	A quick fix to get around a problem (described below) with cia based	2000-09-02 01:05:37 +00:00
cia.c	- Heavyweight interrupt threads on the alpha for device I/O interrupts.	2000-10-05 23:09:57 +00:00
ciareg.h
ciavar.h
irongate_pci.c	Introduce explicit break statements in the various chipsets'	2000-08-31 16:19:27 +00:00
irongate.c
irongatereg.h
irongatevar.h
lca_pci.c	Introduce explicit break statements in the various chipsets'	2000-08-31 16:19:27 +00:00
lca.c
lcareg.h
lcavar.h
pci_eb64plus_intr.s
pci_eb164_intr.s
pcibus.c	- Heavyweight interrupt threads on the alpha for device I/O interrupts.	2000-10-05 23:09:57 +00:00
pcibus.h
swiz.c
t2_pci.c	Introduce explicit break statements in the various chipsets'	2000-08-31 16:19:27 +00:00
t2.c	- Heavyweight interrupt threads on the alpha for device I/O interrupts.	2000-10-05 23:09:57 +00:00
t2reg.h
t2var.h
tsunami_pci.c	Introduce explicit break statements in the various chipsets'	2000-08-31 16:19:27 +00:00
tsunami.c	- Heavyweight interrupt threads on the alpha for device I/O interrupts.	2000-10-05 23:09:57 +00:00
tsunamireg.h
tsunamivar.h