526 lines
13 KiB
C
526 lines
13 KiB
C
/*-
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* Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Allwinner USB PHY
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*/
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#include <sys/cdefs.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/gpio.h>
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#include <machine/bus.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/gpio/gpiobusvar.h>
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#include <dev/extres/clk/clk.h>
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#include <dev/extres/hwreset/hwreset.h>
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#include <dev/extres/regulator/regulator.h>
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#include <dev/extres/phy/phy_usb.h>
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#include "phynode_if.h"
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enum awusbphy_type {
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AWUSBPHY_TYPE_A10 = 1,
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AWUSBPHY_TYPE_A13,
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AWUSBPHY_TYPE_A20,
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AWUSBPHY_TYPE_A31,
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AWUSBPHY_TYPE_H3,
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AWUSBPHY_TYPE_A64,
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AWUSBPHY_TYPE_A83T,
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AWUSBPHY_TYPE_H6,
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};
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struct aw_usbphy_conf {
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int num_phys;
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enum awusbphy_type phy_type;
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bool pmu_unk1;
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bool phy0_route;
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};
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static const struct aw_usbphy_conf a10_usbphy_conf = {
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.num_phys = 3,
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.phy_type = AWUSBPHY_TYPE_A10,
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.pmu_unk1 = false,
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.phy0_route = false,
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};
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static const struct aw_usbphy_conf a13_usbphy_conf = {
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.num_phys = 2,
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.phy_type = AWUSBPHY_TYPE_A13,
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.pmu_unk1 = false,
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.phy0_route = false,
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};
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static const struct aw_usbphy_conf a20_usbphy_conf = {
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.num_phys = 3,
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.phy_type = AWUSBPHY_TYPE_A20,
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.pmu_unk1 = false,
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.phy0_route = false,
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};
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static const struct aw_usbphy_conf a31_usbphy_conf = {
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.num_phys = 3,
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.phy_type = AWUSBPHY_TYPE_A31,
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.pmu_unk1 = false,
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.phy0_route = false,
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};
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static const struct aw_usbphy_conf h3_usbphy_conf = {
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.num_phys = 4,
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.phy_type = AWUSBPHY_TYPE_H3,
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.pmu_unk1 = true,
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.phy0_route = true,
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};
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static const struct aw_usbphy_conf a64_usbphy_conf = {
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.num_phys = 2,
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.phy_type = AWUSBPHY_TYPE_A64,
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.pmu_unk1 = true,
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.phy0_route = true,
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};
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static const struct aw_usbphy_conf a83t_usbphy_conf = {
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.num_phys = 3,
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.phy_type = AWUSBPHY_TYPE_A83T,
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.pmu_unk1 = false,
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.phy0_route = false,
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};
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static const struct aw_usbphy_conf h6_usbphy_conf = {
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.num_phys = 4,
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.phy_type = AWUSBPHY_TYPE_H6,
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.pmu_unk1 = false,
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.phy0_route = true,
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};
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static struct ofw_compat_data compat_data[] = {
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{ "allwinner,sun4i-a10-usb-phy", (uintptr_t)&a10_usbphy_conf },
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{ "allwinner,sun5i-a13-usb-phy", (uintptr_t)&a13_usbphy_conf },
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{ "allwinner,sun6i-a31-usb-phy", (uintptr_t)&a31_usbphy_conf },
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{ "allwinner,sun7i-a20-usb-phy", (uintptr_t)&a20_usbphy_conf },
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{ "allwinner,sun8i-h3-usb-phy", (uintptr_t)&h3_usbphy_conf },
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{ "allwinner,sun50i-a64-usb-phy", (uintptr_t)&a64_usbphy_conf },
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{ "allwinner,sun8i-a83t-usb-phy", (uintptr_t)&a83t_usbphy_conf },
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{ "allwinner,sun50i-h6-usb-phy", (uintptr_t)&h6_usbphy_conf },
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{ NULL, 0 }
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};
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struct awusbphy_softc {
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struct resource * phy_ctrl;
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struct resource ** pmu;
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regulator_t * reg;
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gpio_pin_t id_det_pin;
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int id_det_valid;
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gpio_pin_t vbus_det_pin;
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int vbus_det_valid;
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struct aw_usbphy_conf *phy_conf;
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int mode;
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};
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/* Phy class and methods. */
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static int awusbphy_phy_enable(struct phynode *phy, bool enable);
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static int awusbphy_get_mode(struct phynode *phy, int *mode);
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static int awusbphy_set_mode(struct phynode *phy, int mode);
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static phynode_usb_method_t awusbphy_phynode_methods[] = {
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PHYNODEMETHOD(phynode_enable, awusbphy_phy_enable),
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PHYNODEMETHOD(phynode_usb_get_mode, awusbphy_get_mode),
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PHYNODEMETHOD(phynode_usb_set_mode, awusbphy_set_mode),
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PHYNODEMETHOD_END
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};
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DEFINE_CLASS_1(awusbphy_phynode, awusbphy_phynode_class, awusbphy_phynode_methods,
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sizeof(struct phynode_usb_sc), phynode_usb_class);
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#define RD4(res, o) bus_read_4(res, (o))
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#define WR4(res, o, v) bus_write_4(res, (o), (v))
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#define CLR4(res, o, m) WR4(res, o, RD4(res, o) & ~(m))
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#define SET4(res, o, m) WR4(res, o, RD4(res, o) | (m))
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#define PHY_CSR 0x00
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#define ID_PULLUP_EN (1 << 17)
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#define DPDM_PULLUP_EN (1 << 16)
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#define FORCE_ID (0x3 << 14)
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#define FORCE_ID_SHIFT 14
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#define FORCE_ID_LOW 2
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#define FORCE_ID_HIGH 3
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#define FORCE_VBUS_VALID (0x3 << 12)
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#define FORCE_VBUS_VALID_SHIFT 12
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#define FORCE_VBUS_VALID_LOW 2
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#define FORCE_VBUS_VALID_HIGH 3
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#define VBUS_CHANGE_DET (1 << 6)
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#define ID_CHANGE_DET (1 << 5)
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#define DPDM_CHANGE_DET (1 << 4)
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#define OTG_PHY_CFG 0x20
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#define OTG_PHY_ROUTE_OTG (1 << 0)
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#define PMU_IRQ_ENABLE 0x00
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#define PMU_AHB_INCR8 (1 << 10)
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#define PMU_AHB_INCR4 (1 << 9)
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#define PMU_AHB_INCRX_ALIGN (1 << 8)
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#define PMU_ULPI_BYPASS (1 << 0)
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#define PMU_UNK_H3 0x10
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#define PMU_UNK_H3_CLR 0x2
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static void
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awusbphy_configure(device_t dev, int phyno)
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{
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struct awusbphy_softc *sc;
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sc = device_get_softc(dev);
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if (sc->pmu[phyno] == NULL)
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return;
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if (sc->phy_conf->pmu_unk1 == true)
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CLR4(sc->pmu[phyno], PMU_UNK_H3, PMU_UNK_H3_CLR);
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SET4(sc->pmu[phyno], PMU_IRQ_ENABLE, PMU_ULPI_BYPASS |
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PMU_AHB_INCR8 | PMU_AHB_INCR4 | PMU_AHB_INCRX_ALIGN);
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}
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static int
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awusbphy_init(device_t dev)
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{
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struct awusbphy_softc *sc;
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phandle_t node;
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char pname[20];
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uint32_t val;
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int error, off, rid;
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regulator_t reg;
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hwreset_t rst;
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clk_t clk;
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sc = device_get_softc(dev);
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node = ofw_bus_get_node(dev);
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sc->phy_conf = (struct aw_usbphy_conf *)ofw_bus_search_compatible(dev, compat_data)->ocd_data;
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/* Get phy_ctrl region */
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if (ofw_bus_find_string_index(node, "reg-names", "phy_ctrl", &rid) != 0) {
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device_printf(dev, "Cannot locate phy control resource\n");
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return (ENXIO);
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}
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sc->phy_ctrl = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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if (sc->phy_ctrl == NULL) {
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device_printf(dev, "Cannot allocate resource\n");
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return (ENXIO);
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}
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/* Enable clocks */
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for (off = 0; clk_get_by_ofw_index(dev, 0, off, &clk) == 0; off++) {
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error = clk_enable(clk);
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if (error != 0) {
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device_printf(dev, "couldn't enable clock %s\n",
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clk_get_name(clk));
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return (error);
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}
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}
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/* De-assert resets */
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for (off = 0; hwreset_get_by_ofw_idx(dev, 0, off, &rst) == 0; off++) {
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error = hwreset_deassert(rst);
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if (error != 0) {
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device_printf(dev, "couldn't de-assert reset %d\n",
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off);
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return (error);
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}
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}
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/* Get GPIOs */
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error = gpio_pin_get_by_ofw_property(dev, node, "usb0_id_det-gpios",
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&sc->id_det_pin);
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if (error == 0)
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sc->id_det_valid = 1;
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error = gpio_pin_get_by_ofw_property(dev, node, "usb0_vbus_det-gpios",
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&sc->vbus_det_pin);
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if (error == 0)
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sc->vbus_det_valid = 1;
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sc->reg = malloc(sizeof(*(sc->reg)) * sc->phy_conf->num_phys, M_DEVBUF,
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M_WAITOK | M_ZERO);
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sc->pmu = malloc(sizeof(*(sc->pmu)) * sc->phy_conf->num_phys, M_DEVBUF,
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M_WAITOK | M_ZERO);
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/* Get regulators */
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for (off = 0; off < sc->phy_conf->num_phys; off++) {
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snprintf(pname, sizeof(pname), "usb%d_vbus-supply", off);
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if (regulator_get_by_ofw_property(dev, 0, pname, ®) == 0)
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sc->reg[off] = reg;
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snprintf(pname, sizeof(pname), "pmu%d", off);
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if (ofw_bus_find_string_index(node, "reg-names",
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pname, &rid) != 0)
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continue;
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sc->pmu[off] = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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if (sc->pmu[off] == NULL) {
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device_printf(dev, "Cannot allocate resource\n");
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return (ENXIO);
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}
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}
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/* Enable OTG PHY for host mode */
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val = bus_read_4(sc->phy_ctrl, PHY_CSR);
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val &= ~(VBUS_CHANGE_DET | ID_CHANGE_DET | DPDM_CHANGE_DET);
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val |= (ID_PULLUP_EN | DPDM_PULLUP_EN);
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val &= ~FORCE_ID;
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val |= (FORCE_ID_LOW << FORCE_ID_SHIFT);
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val &= ~FORCE_VBUS_VALID;
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val |= (FORCE_VBUS_VALID_HIGH << FORCE_VBUS_VALID_SHIFT);
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bus_write_4(sc->phy_ctrl, PHY_CSR, val);
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return (0);
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}
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static int
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awusbphy_vbus_detect(device_t dev, int *val)
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{
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struct awusbphy_softc *sc;
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bool active;
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int error;
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sc = device_get_softc(dev);
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if (sc->vbus_det_valid) {
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error = gpio_pin_is_active(sc->vbus_det_pin, &active);
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if (error != 0) {
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device_printf(dev, "Cannot get status of id pin %d\n",
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error);
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return (error);
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}
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*val = active;
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return (0);
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}
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/* TODO check vbus_power-supply. */
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/*
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* If there is no way to detect, assume present.
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*/
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*val = 1;
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return (0);
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}
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static int
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awusbphy_phy_enable(struct phynode *phynode, bool enable)
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{
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device_t dev;
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intptr_t phy;
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struct awusbphy_softc *sc;
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regulator_t reg;
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int error, vbus_det;
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dev = phynode_get_device(phynode);
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phy = phynode_get_id(phynode);
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sc = device_get_softc(dev);
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if (phy < 0 || phy >= sc->phy_conf->num_phys)
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return (ERANGE);
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/* Configure PHY */
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awusbphy_configure(dev, phy);
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/* Regulators are optional. If not found, return success. */
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reg = sc->reg[phy];
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if (reg == NULL)
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return (0);
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if (phy == 0) {
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/* If an external vbus is detected, do not enable phy 0 */
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error = awusbphy_vbus_detect(dev, &vbus_det);
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if (error)
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goto out;
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/* TODO check vbus_power-supply as well. */
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if (sc->vbus_det_valid && vbus_det == 1) {
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if (bootverbose)
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device_printf(dev, "External VBUS detected, "
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"not enabling the regulator\n");
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return (0);
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}
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}
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if (enable) {
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/* Depending on the PHY we need to route OTG to OHCI/EHCI */
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error = regulator_enable(reg);
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} else
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error = regulator_disable(reg);
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out:
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if (error != 0) {
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device_printf(dev,
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"couldn't %s regulator for phy %jd\n",
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enable ? "enable" : "disable", (intmax_t)phy);
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return (error);
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}
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return (0);
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}
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static int
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awusbphy_get_mode(struct phynode *phynode, int *mode)
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{
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struct awusbphy_softc *sc;
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device_t dev;
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dev = phynode_get_device(phynode);
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sc = device_get_softc(dev);
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*mode = sc->mode;
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return (0);
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}
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static int
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awusbphy_set_mode(struct phynode *phynode, int mode)
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{
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device_t dev;
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intptr_t phy;
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struct awusbphy_softc *sc;
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uint32_t val;
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int error, vbus_det;
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dev = phynode_get_device(phynode);
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phy = phynode_get_id(phynode);
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sc = device_get_softc(dev);
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if (phy != 0) {
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if (mode != PHY_USB_MODE_HOST)
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return (EINVAL);
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return (0);
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}
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if (sc->mode == mode)
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return (0);
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if (mode == PHY_USB_MODE_OTG) /* TODO */
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return (EOPNOTSUPP);
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error = awusbphy_vbus_detect(dev, &vbus_det);
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if (error != 0)
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return (error);
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val = bus_read_4(sc->phy_ctrl, PHY_CSR);
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val &= ~(VBUS_CHANGE_DET | ID_CHANGE_DET | DPDM_CHANGE_DET);
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val |= (ID_PULLUP_EN | DPDM_PULLUP_EN);
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val &= ~FORCE_VBUS_VALID;
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val |= (vbus_det ? FORCE_VBUS_VALID_HIGH : FORCE_VBUS_VALID_LOW) <<
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FORCE_VBUS_VALID_SHIFT;
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val &= ~FORCE_ID;
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switch (mode) {
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case PHY_USB_MODE_HOST:
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val |= (FORCE_ID_LOW << FORCE_ID_SHIFT);
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if (sc->phy_conf->phy0_route)
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CLR4(sc->phy_ctrl, OTG_PHY_CFG, OTG_PHY_ROUTE_OTG);
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break;
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case PHY_USB_MODE_DEVICE:
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val |= (FORCE_ID_HIGH << FORCE_ID_SHIFT);
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if (sc->phy_conf->phy0_route)
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SET4(sc->phy_ctrl, OTG_PHY_CFG, OTG_PHY_ROUTE_OTG);
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break;
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default:
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return (EINVAL);
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}
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bus_write_4(sc->phy_ctrl, PHY_CSR, val);
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sc->mode = mode;
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return (0);
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}
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static int
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awusbphy_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
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return (ENXIO);
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device_set_desc(dev, "Allwinner USB PHY");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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awusbphy_attach(device_t dev)
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{
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int error;
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struct phynode *phynode;
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struct phynode_init_def phy_init;
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struct awusbphy_softc *sc;
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int i;
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sc = device_get_softc(dev);
|
|
error = awusbphy_init(dev);
|
|
if (error) {
|
|
device_printf(dev, "failed to initialize USB PHY, error %d\n",
|
|
error);
|
|
return (error);
|
|
}
|
|
|
|
/* Create and register phys. */
|
|
for (i = 0; i < sc->phy_conf->num_phys; i++) {
|
|
bzero(&phy_init, sizeof(phy_init));
|
|
phy_init.id = i;
|
|
phy_init.ofw_node = ofw_bus_get_node(dev);
|
|
phynode = phynode_create(dev, &awusbphy_phynode_class,
|
|
&phy_init);
|
|
if (phynode == NULL) {
|
|
device_printf(dev, "failed to create USB PHY\n");
|
|
return (ENXIO);
|
|
}
|
|
if (phynode_register(phynode) == NULL) {
|
|
device_printf(dev, "failed to create USB PHY\n");
|
|
return (ENXIO);
|
|
}
|
|
}
|
|
|
|
return (error);
|
|
}
|
|
|
|
static device_method_t awusbphy_methods[] = {
|
|
/* Device interface */
|
|
DEVMETHOD(device_probe, awusbphy_probe),
|
|
DEVMETHOD(device_attach, awusbphy_attach),
|
|
|
|
DEVMETHOD_END
|
|
};
|
|
|
|
static driver_t awusbphy_driver = {
|
|
"awusbphy",
|
|
awusbphy_methods,
|
|
sizeof(struct awusbphy_softc)
|
|
};
|
|
|
|
/* aw_usbphy needs to come up after regulators/gpio/etc, but before ehci/ohci */
|
|
EARLY_DRIVER_MODULE(awusbphy, simplebus, awusbphy_driver, 0, 0,
|
|
BUS_PASS_SUPPORTDEV + BUS_PASS_ORDER_MIDDLE);
|
|
MODULE_VERSION(awusbphy, 1);
|