184ed5f988
Massive update. The highlights: o dramatically cut memory usage by writing better, less intertwingled code. o implement booting off mmc/sd cards (sd only tested one at the moment) o start to split out board specific stuff for boot2.
278 lines
10 KiB
C
278 lines
10 KiB
C
/*-
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* Copyright (c) 2006 M. Warner Losh. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* This software is derived from software provide by Kwikbyte who specifically
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* disclaimed copyright on the code.
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*
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* $FreeBSD$
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*/
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#ifndef __LIBAT91RM9200_H
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#define __LIBAT91RM9200_H
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#include "at91rm9200.h"
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//*----------------------------------------------------------------------------
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//* \fn AT91F_PMC_EnablePeriphClock
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//* \brief Enable peripheral clock
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//*----------------------------------------------------------------------------
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static inline void
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AT91F_PMC_EnablePeriphClock (
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AT91PS_PMC pPMC, // \arg pointer to PMC controller
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unsigned int periphIds) // \arg IDs of peripherals to enable
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{
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pPMC->PMC_PCER = periphIds;
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}
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/* *****************************************************************************
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SOFTWARE API FOR PIO
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***************************************************************************** */
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//*----------------------------------------------------------------------------
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//* \fn AT91F_PIO_CfgPeriph
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//* \brief Enable pins to be drived by peripheral
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//*----------------------------------------------------------------------------
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static inline
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void AT91F_PIO_CfgPeriph(
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AT91PS_PIO pPio, // \arg pointer to a PIO controller
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unsigned int periphAEnable, // \arg PERIPH A to enable
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unsigned int periphBEnable) // \arg PERIPH B to enable
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{
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if (periphAEnable)
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pPio->PIO_ASR = periphAEnable;
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if (periphBEnable)
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pPio->PIO_BSR = periphBEnable;
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pPio->PIO_PDR = (periphAEnable | periphBEnable); // Set in Periph mode
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}
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/* *****************************************************************************
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SOFTWARE API FOR MCI
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***************************************************************************** */
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//* Classic MCI Data Timeout Register Configuration with 1048576 MCK cycles between 2 data transfer
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#define AT91C_MCI_DTOR_1MEGA_CYCLES (AT91C_MCI_DTOCYC | AT91C_MCI_DTOMUL)
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//* Classic MCI SDCard Register Configuration with 1-bit data bus on slot A
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#define AT91C_MCI_MMC_SLOTA (AT91C_MCI_SCDSEL & 0x0)
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//* Classic MCI SDCard Register Configuration with 1-bit data bus on slot B
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#define AT91C_MCI_MMC_SLOTB (AT91C_MCI_SCDSEL)
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//* Classic MCI SDCard Register Configuration with 4-bit data bus on slot A
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#define AT91C_MCI_SDCARD_4BITS_SLOTA ( (AT91C_MCI_SCDSEL & 0x0) | AT91C_MCI_SCDBUS )
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//* Classic MCI SDCard Register Configuration with 4-bit data bus on slot B
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#define AT91C_MCI_SDCARD_4BITS_SLOTB (AT91C_MCI_SCDSEL | AT91C_MCI_SCDBUS)
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//*----------------------------------------------------------------------------
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//* \fn AT91F_MCI_Configure
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//* \brief Configure the MCI
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//*----------------------------------------------------------------------------
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static inline
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void AT91F_MCI_Configure(
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AT91PS_MCI pMCI, // \arg pointer to a MCI controller
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unsigned int DTOR_register, // \arg Data Timeout Register to be programmed
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unsigned int MR_register, // \arg Mode Register to be programmed
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unsigned int SDCR_register) // \arg SDCard Register to be programmed
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{
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//* Reset the MCI
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pMCI->MCI_CR = AT91C_MCI_MCIEN | AT91C_MCI_PWSEN;
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//* Disable all the interrupts
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pMCI->MCI_IDR = 0xFFFFFFFF;
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//* Set the Data Timeout Register
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pMCI->MCI_DTOR = DTOR_register;
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//* Set the Mode Register
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pMCI->MCI_MR = MR_register;
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//* Set the SDCard Register
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pMCI->MCI_SDCR = SDCR_register;
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}
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//*----------------------------------------------------------------------------
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//* \fn AT91F_MCI_CfgPMC
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//* \brief Enable Peripheral clock in PMC for MCI
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//*----------------------------------------------------------------------------
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static inline void
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AT91F_MCI_CfgPMC(void)
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{
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AT91F_PMC_EnablePeriphClock(
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AT91C_BASE_PMC, // PIO controller base address
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((unsigned int) 1 << AT91C_ID_MCI));
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}
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//*----------------------------------------------------------------------------
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//* \fn AT91F_MCI_CfgPIO
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//* \brief Configure PIO controllers to drive MCI signals
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//*----------------------------------------------------------------------------
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static inline void
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AT91F_MCI_CfgPIO(void)
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{
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// Configure PIO controllers to periph mode
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AT91F_PIO_CfgPeriph(
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AT91C_BASE_PIOA, // PIO controller base address
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((unsigned int) AT91C_PA28_MCCDA ) |
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((unsigned int) AT91C_PA29_MCDA0 ) |
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((unsigned int) AT91C_PA27_MCCK ), // Peripheral A
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0); // Peripheral B
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// Configure PIO controllers to periph mode
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AT91F_PIO_CfgPeriph(
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AT91C_BASE_PIOB, // PIO controller base address
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0, // Peripheral A
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((unsigned int) AT91C_PB5_MCDA3 ) |
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((unsigned int) AT91C_PB3_MCDA1 ) |
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((unsigned int) AT91C_PB4_MCDA2 )); // Peripheral B
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}
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/* *****************************************************************************
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SOFTWARE API FOR PDC
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***************************************************************************** */
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//*----------------------------------------------------------------------------
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//* \fn AT91F_PDC_SetNextRx
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//* \brief Set the next receive transfer descriptor
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//*----------------------------------------------------------------------------
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static inline void
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AT91F_PDC_SetNextRx (
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AT91PS_PDC pPDC, // \arg pointer to a PDC controller
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char *address, // \arg address to the next bloc to be received
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unsigned int bytes) // \arg number of bytes to be received
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{
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pPDC->PDC_RNPR = (unsigned int) address;
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pPDC->PDC_RNCR = bytes;
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}
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//*----------------------------------------------------------------------------
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//* \fn AT91F_PDC_SetNextTx
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//* \brief Set the next transmit transfer descriptor
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//*----------------------------------------------------------------------------
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static inline void
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AT91F_PDC_SetNextTx(
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AT91PS_PDC pPDC, // \arg pointer to a PDC controller
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char *address, // \arg address to the next bloc to be transmitted
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unsigned int bytes) // \arg number of bytes to be transmitted
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{
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pPDC->PDC_TNPR = (unsigned int) address;
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pPDC->PDC_TNCR = bytes;
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}
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//*----------------------------------------------------------------------------
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//* \fn AT91F_PDC_SetRx
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//* \brief Set the receive transfer descriptor
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//*----------------------------------------------------------------------------
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static inline void
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AT91F_PDC_SetRx(
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AT91PS_PDC pPDC, // \arg pointer to a PDC controller
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char *address, // \arg address to the next bloc to be received
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unsigned int bytes) // \arg number of bytes to be received
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{
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pPDC->PDC_RPR = (unsigned int) address;
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pPDC->PDC_RCR = bytes;
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}
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//*----------------------------------------------------------------------------
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//* \fn AT91F_PDC_SetTx
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//* \brief Set the transmit transfer descriptor
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//*----------------------------------------------------------------------------
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static inline void
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AT91F_PDC_SetTx(
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AT91PS_PDC pPDC, // \arg pointer to a PDC controller
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char *address, // \arg address to the next bloc to be transmitted
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unsigned int bytes) // \arg number of bytes to be transmitted
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{
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pPDC->PDC_TPR = (unsigned int) address;
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pPDC->PDC_TCR = bytes;
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}
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//*----------------------------------------------------------------------------
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//* \fn AT91F_PDC_EnableTx
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//* \brief Enable transmit
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//*----------------------------------------------------------------------------
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static inline void
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AT91F_PDC_EnableTx(
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AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
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{
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pPDC->PDC_PTCR = AT91C_PDC_TXTEN;
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}
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//*----------------------------------------------------------------------------
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//* \fn AT91F_PDC_EnableRx
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//* \brief Enable receive
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//*----------------------------------------------------------------------------
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static inline void
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AT91F_PDC_EnableRx(
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AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
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{
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pPDC->PDC_PTCR = AT91C_PDC_RXTEN;
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}
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//*----------------------------------------------------------------------------
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//* \fn AT91F_PDC_DisableTx
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//* \brief Disable transmit
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//*----------------------------------------------------------------------------
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static inline void
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AT91F_PDC_DisableTx(
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AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
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{
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pPDC->PDC_PTCR = AT91C_PDC_TXTDIS;
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}
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//*----------------------------------------------------------------------------
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//* \fn AT91F_PDC_DisableRx
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//* \brief Disable receive
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//*----------------------------------------------------------------------------
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static inline void
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AT91F_PDC_DisableRx(
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AT91PS_PDC pPDC ) // \arg pointer to a PDC controller
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{
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pPDC->PDC_PTCR = AT91C_PDC_RXTDIS;
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}
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//*----------------------------------------------------------------------------
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//* \fn AT91F_PDC_Open
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//* \brief Open PDC: disable TX and RX reset transfer descriptors, re-enable RX and TX
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//*----------------------------------------------------------------------------
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static inline void
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AT91F_PDC_Open(
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AT91PS_PDC pPDC) // \arg pointer to a PDC controller
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{
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//* Disable the RX and TX PDC transfer requests
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AT91F_PDC_DisableRx(pPDC);
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AT91F_PDC_DisableTx(pPDC);
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//* Reset all Counter register Next buffer first
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AT91F_PDC_SetNextTx(pPDC, (char *) 0, 0);
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AT91F_PDC_SetNextRx(pPDC, (char *) 0, 0);
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AT91F_PDC_SetTx(pPDC, (char *) 0, 0);
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AT91F_PDC_SetRx(pPDC, (char *) 0, 0);
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//* Enable the RX and TX PDC transfer requests
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AT91F_PDC_EnableRx(pPDC);
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AT91F_PDC_EnableTx(pPDC);
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}
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#endif
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