For 1000Mb mode to work reliably TX/RX delays need to be configured between the TX/RX clock and the respective signals on the PHY to compensate for differing trace lengths on the PCB. Reviewed by: manu MFC after: 1 week |
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clk | ||
if_dwc_rk.c | ||
rk805.c | ||
rk805reg.h | ||
rk3399_emmcphy.c | ||
rk_dwc3.c | ||
rk_gpio.c | ||
rk_grf.c | ||
rk_i2c.c | ||
rk_iodomain.c | ||
rk_pcie_phy.c | ||
rk_pcie.c | ||
rk_pinctrl.c | ||
rk_pwm.c | ||
rk_spi.c | ||
rk_tsadc_if.m | ||
rk_tsadc.c | ||
rk_typec_phy.c | ||
rk_usb2phy.c |