805eb13a60
NetBSD and OpenBSD have libc wrapper functions for the ARM_SYNC_ICACHE and ARM_DRAIN_WRITEBUF sysarch operations. This change adds compatible functions to our library. This should make it easier for various upstream sources to support *BSD operating systems with a single variation of cache maintence code in tools like interpreters and JIT compilers. I consider the argument types passed to arm_sync_icache() to be especially unfortunate, but this is intended to match the other BSDs. Differential Revision: https://reviews.freebsd.org/D20906
80 lines
2.8 KiB
Groff
80 lines
2.8 KiB
Groff
.\" Copyright (c) 2019 Ian Lepore <ian@FreeBSD.org>
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd July 10, 2019
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.Dt ARM_sync_icache 2
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.Os
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.Sh NAME
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.Nm arm_sync_icache
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.Nd synchronize the data and instruction caches
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.Sh LIBRARY
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.Lb libc
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.Sh SYNOPSIS
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.In machine/sysarch.h
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.Ft int
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.Fn arm_sync_icache "u_int addr" "int len"
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.Sh DESCRIPTION
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The
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.Nm
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system call synchronizes the contents of any data and instructions caches
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with the contents of main memory for the given range.
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Use this after loading executable code or modifying existing code in memory,
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before attempting to execute that code.
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.Pp
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The
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.Va addr
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and
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.Va len
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arguments do not need to be aligned to any particular boundary, but
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cache operations will affect entire cache lines, even those which are only
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partially overlapped by the given range.
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.Pp
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This takes one or more of the following actions, depending on the requirements
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of the hardware:
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.Bl -bullet
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.It
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Write dirty data cache lines within the range back to main memory.
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.It
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Invalidate existing instruction cache contents for the range.
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.It
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Invalidate branch prediction caches for the range.
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.El
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.Pp
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On hardware which supports multiple synchronization points for cache
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operations, the caches are maintained to the point of unification,
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making the data in the range coherent amongst all cores.
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.Sh RETURN VALUES
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The
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.Nm
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system call always returns 0.
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.Sh ERRORS
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If a call refers to memory which the calling process does not have rights
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to access, or if the
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.Va len
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argument is negative, a SIGSEGV signal is delivered to the calling thread.
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.Sh AUTHORS
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This man page was written by
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.An Ian Lepore .
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