7c12b677f5
These are older MIPS4kc parts from Atheros. They typically ran at sub-200MHz and have 11bg, 11a, or 11abg wifi MAC/PHYs integrated. This port is the initial non-wifi pieces required to bring up the chip. I'll commit the redboot and other pieces later, and then hopefully(!) wifi support will follow. Submitted by: Mori Hiroki <yamori813@yahoo.co.jp> Differential Revision: https://reviews.freebsd.org/D7237
64 lines
2.0 KiB
C
64 lines
2.0 KiB
C
/*-
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* Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _APBVAR_H_
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#define _APBVAR_H_
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#define APB_IRQ_BASE 0
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#define APB_IRQ_END 31
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#define APB_NIRQS 32
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struct apb_pic_irqsrc {
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struct intr_irqsrc isrc;
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u_int irq;
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};
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struct apb_softc {
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device_t apb_dev;
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struct rman apb_irq_rman;
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struct rman apb_mem_rman;
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/* IRQ events structs for child devices */
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struct intr_event *sc_eventstab[APB_NIRQS];
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#ifndef INTRNG
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mips_intrcnt_t sc_intr_counter[APB_NIRQS];
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#endif
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/* Resources and cookies for MIPS CPU INTs */
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struct resource *sc_misc_irq;
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void *sc_misc_ih;
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#ifdef INTRNG
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struct apb_pic_irqsrc pic_irqs[APB_NIRQS];
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#endif
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};
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struct apb_ivar {
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struct resource_list resources;
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};
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#endif /* _APBVAR_H_ */
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