7c12b677f5
These are older MIPS4kc parts from Atheros. They typically ran at sub-200MHz and have 11bg, 11a, or 11abg wifi MAC/PHYs integrated. This port is the initial non-wifi pieces required to bring up the chip. I'll commit the redboot and other pieces later, and then hopefully(!) wifi support will follow. Submitted by: Mori Hiroki <yamori813@yahoo.co.jp> Differential Revision: https://reviews.freebsd.org/D7237
162 lines
4.1 KiB
C
162 lines
4.1 KiB
C
/*-
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* Copyright (c) 2016, Hiroki Mori
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* Copyright (c) 2010 Adrian Chadd
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_ddb.h"
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#include "opt_ar531x.h"
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#include <sys/param.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/cons.h>
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#include <sys/kdb.h>
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#include <sys/reboot.h>
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#include <vm/vm.h>
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#include <vm/vm_page.h>
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#include <net/ethernet.h>
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#include <machine/clock.h>
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#include <machine/cpu.h>
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#include <machine/cpuregs.h>
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#include <machine/hwfunc.h>
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#include <machine/md_var.h>
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#include <machine/trap.h>
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#include <machine/vmparam.h>
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#include <mips/atheros/ar531x/ar5315reg.h>
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#include <mips/atheros/ar531x/ar5312reg.h>
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#include <mips/atheros/ar531x/ar5315_setup.h>
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#include <mips/atheros/ar531x/ar5315_cpudef.h>
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#include <mips/atheros/ar531x/ar5315_chip.h>
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#include <mips/atheros/ar531x/ar5312_chip.h>
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#include <mips/atheros/ar724x_chip.h>
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#include <mips/atheros/ar91xx_chip.h>
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#include <dev/ath/ath_hal/ah_soc.h>
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#define AR5315_SYS_TYPE_LEN 128
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static char ar5315_sys_type[AR5315_SYS_TYPE_LEN];
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enum ar531x_soc_type ar531x_soc;
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struct ar5315_cpu_def * ar5315_cpu_ops = NULL;
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void
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ar5315_detect_sys_type(void)
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{
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char *chip = "????";
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uint32_t ver = 0;
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uint32_t rev = 0;
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#if 0
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const uint8_t *ptr, *end;
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static const struct ar531x_boarddata *board = NULL;
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ptr = (const uint8_t *) MIPS_PHYS_TO_KSEG1(AR5315_CONFIG_END
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- 0x1000);
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end = (const uint8_t *)AR5315_CONFIG_BASE;
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for (; ptr > end; ptr -= 0x1000) {
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if (*(const uint32_t *)ptr == AR531X_BD_MAGIC) {
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board = (const struct ar531x_boarddata *) ptr;
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rev = board->major;
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break;
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}
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}
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#endif
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int soctype;
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#ifdef AR531X_1ST_GENERATION
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soctype = AR_FIRST_GEN;
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#else
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soctype = AR_SECOND_GEN;
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#endif
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if(soctype == AR_SECOND_GEN) {
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ar5315_cpu_ops = &ar5315_chip_def;
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ver = ATH_READ_REG(AR5315_SYSREG_BASE +
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AR5315_SYSREG_SREV);
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switch (ver) {
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case 0x86:
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ar531x_soc = AR531X_SOC_AR5315;
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chip = "2315";
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break;
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case 0x87:
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ar531x_soc = AR531X_SOC_AR5316;
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chip = "2316";
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break;
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case 0x90:
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ar531x_soc = AR531X_SOC_AR5317;
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chip = "2317";
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break;
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case 0x91:
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ar531x_soc = AR531X_SOC_AR5318;
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chip = "2318";
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break;
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}
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} else {
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ar5315_cpu_ops = &ar5312_chip_def;
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ver = ATH_READ_REG(AR5312_SYSREG_BASE +
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AR5312_SYSREG_REVISION);
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rev = AR5312_REVISION_MINOR(ver);
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switch (AR5312_REVISION_MAJOR(ver)) {
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case AR5312_REVISION_MAJ_AR5311:
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ar531x_soc = AR531X_SOC_AR5311;
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chip = "5311";
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break;
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case AR5312_REVISION_MAJ_AR5312:
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ar531x_soc = AR531X_SOC_AR5312;
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chip = "5312";
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break;
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case AR5312_REVISION_MAJ_AR2313:
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ar531x_soc = AR531X_SOC_AR5313;
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chip = "2313";
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break;
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}
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}
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sprintf(ar5315_sys_type, "Atheros AR%s rev %u", chip, rev);
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}
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const char *
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ar5315_get_system_type(void)
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{
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return ar5315_sys_type;
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}
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