freebsd-dev/sys/dev/uart
Benno Rice 0aefb0a63c The XScale PXA255 has three generally ns16x50 compatible UARTs. One of the
variations from normal 16x50 behaviour however is the the use of a normally
unused bit of IER to control RX timeout interrupts independently of the
generally used RXRDY bit.  If this bit is not enabled, we only ever get
interrupts when the FIFO is full, never before.  This is not very useful when
the UART is being used as a console.

In order to support this without causing potential problems on more "normal"
16x50 variants, this change introduces two hints for the uart device, ier_mask
and ier_rxbits.  These can be used to override which bits get set and cleared
when we're enabling and disabling RX interrupts.

Reviewed by:	marcel
2008-05-30 01:57:13 +00:00
..
uart_bus_acpi.c
uart_bus_ebus.c
uart_bus_isa.c
uart_bus_ocp.c Initial support for Freescale PowerQUICC III MPC85xx system-on-chip family. 2008-03-03 17:17:00 +00:00
uart_bus_pccard.c
uart_bus_pci.c
uart_bus_puc.c
uart_bus_scc.c Support for Freescale QUad Integrated Communications Controller. 2008-03-03 18:20:17 +00:00
uart_bus.h
uart_core.c Expand kdb_alt_break a little, most commonly used with the option 2008-05-04 23:29:38 +00:00
uart_cpu_amd64.c
uart_cpu_i386.c
uart_cpu_ia64.c
uart_cpu_pc98.c
uart_cpu_powerpc.c Initial support for Freescale PowerQUICC III MPC85xx system-on-chip family. 2008-03-03 17:17:00 +00:00
uart_cpu_sparc64.c
uart_cpu.h
uart_dbg.c
uart_dev_ns8250.c The XScale PXA255 has three generally ns16x50 compatible UARTs. One of the 2008-05-30 01:57:13 +00:00
uart_dev_quicc.c Support for Freescale QUad Integrated Communications Controller. 2008-03-03 18:20:17 +00:00
uart_dev_sab82532.c
uart_dev_z8530.c
uart_if.m
uart_kbd_sun_tables.h
uart_kbd_sun.c
uart_kbd_sun.h
uart_subr.c
uart_tty.c
uart.h add device hints to control the rx FIFO interrupt level on 16550A parts 2008-03-12 19:09:20 +00:00