71d104536b
The ice(4) driver is the driver for the Intel E8xx series Ethernet controllers; currently with codenames Columbiaville and Columbia Park. These new controllers support 100G speeds, as well as introducing more queues, better virtualization support, and more offload capabilities. Future work will enable virtual functions (like in ixl(4)) and the other functionality outlined above. For full functionality, the kernel should be compiled with "device ice_ddp" like in the amd64 NOTES file, and/or ice_ddp_load="YES" should be added to /boot/loader.conf so that the DDP package file included in this commit can be downloaded to the adapter. Otherwise, the adapter will fall back to a single queue mode with limited functionality. A man page for this driver will be forthcoming. MFC after: 1 month Relnotes: yes Sponsored by: Intel Corporation Differential Revision: https://reviews.freebsd.org/D21959
144 lines
5.6 KiB
C
144 lines
5.6 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause */
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/* Copyright (c) 2020, Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*$FreeBSD$*/
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#ifndef _ICE_NVM_H_
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#define _ICE_NVM_H_
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#define ICE_NVM_CMD_READ 0x0000000B
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#define ICE_NVM_CMD_WRITE 0x0000000C
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/* NVM Access config bits */
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#define ICE_NVM_CFG_MODULE_M MAKEMASK(0xFF, 0)
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#define ICE_NVM_CFG_MODULE_S 0
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#define ICE_NVM_CFG_FLAGS_M MAKEMASK(0xF, 8)
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#define ICE_NVM_CFG_FLAGS_S 8
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#define ICE_NVM_CFG_EXT_FLAGS_M MAKEMASK(0xF, 12)
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#define ICE_NVM_CFG_EXT_FLAGS_S 12
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#define ICE_NVM_CFG_ADAPTER_INFO_M MAKEMASK(0xFFFF, 16)
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#define ICE_NVM_CFG_ADAPTER_INFO_S 16
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/* NVM Read Get Driver Features */
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#define ICE_NVM_GET_FEATURES_MODULE 0xE
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#define ICE_NVM_GET_FEATURES_FLAGS 0xF
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/* NVM Read/Write Mapped Space */
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#define ICE_NVM_REG_RW_MODULE 0x0
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#define ICE_NVM_REG_RW_FLAGS 0x1
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#define ICE_NVM_ACCESS_MAJOR_VER 0
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#define ICE_NVM_ACCESS_MINOR_VER 5
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/* NVM Access feature flags. Other bits in the features field are reserved and
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* should be set to zero when reporting the ice_nvm_features structure.
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*/
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#define ICE_NVM_FEATURES_0_REG_ACCESS BIT(1)
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/* NVM Access Features */
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struct ice_nvm_features {
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u8 major; /* Major version (informational only) */
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u8 minor; /* Minor version (informational only) */
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u16 size; /* size of ice_nvm_features structure */
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u8 features[12]; /* Array of feature bits */
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};
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/* NVM Access command */
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struct ice_nvm_access_cmd {
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u32 command; /* NVM command: READ or WRITE */
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u32 config; /* NVM command configuration */
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u32 offset; /* offset to read/write, in bytes */
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u32 data_size; /* size of data field, in bytes */
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};
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/* NVM Access data */
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union ice_nvm_access_data {
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u32 regval; /* Storage for register value */
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struct ice_nvm_features drv_features; /* NVM features */
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};
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/* NVM Access registers */
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#define GL_HIDA(_i) (0x00082000 + ((_i) * 4))
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#define GL_HIBA(_i) (0x00081000 + ((_i) * 4))
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#define GL_HICR 0x00082040
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#define GL_HICR_EN 0x00082044
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#define GLGEN_CSR_DEBUG_C 0x00075750
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#define GLPCI_LBARCTRL 0x0009DE74
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#define GLNVM_GENS 0x000B6100
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#define GLNVM_FLA 0x000B6108
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#define ICE_NVM_ACCESS_GL_HIDA_MAX 15
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#define ICE_NVM_ACCESS_GL_HIBA_MAX 1023
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u32 ice_nvm_access_get_module(struct ice_nvm_access_cmd *cmd);
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u32 ice_nvm_access_get_flags(struct ice_nvm_access_cmd *cmd);
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u32 ice_nvm_access_get_adapter(struct ice_nvm_access_cmd *cmd);
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enum ice_status
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ice_nvm_access_read(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
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union ice_nvm_access_data *data);
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enum ice_status
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ice_nvm_access_write(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
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union ice_nvm_access_data *data);
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enum ice_status
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ice_nvm_access_get_features(struct ice_nvm_access_cmd *cmd,
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union ice_nvm_access_data *data);
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enum ice_status
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ice_handle_nvm_access(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
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union ice_nvm_access_data *data);
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enum ice_status
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ice_acquire_nvm(struct ice_hw *hw, enum ice_aq_res_access_type access);
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void ice_release_nvm(struct ice_hw *hw);
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enum ice_status
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ice_aq_read_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset, u16 length,
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void *data, bool last_command, bool read_shadow_ram,
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struct ice_sq_cd *cd);
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enum ice_status
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ice_read_flat_nvm(struct ice_hw *hw, u32 offset, u32 *length, u8 *data,
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bool read_shadow_ram);
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enum ice_status
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ice_get_pfa_module_tlv(struct ice_hw *hw, u16 *module_tlv, u16 *module_tlv_len,
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u16 module_type);
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enum ice_status
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ice_read_pba_string(struct ice_hw *hw, u8 *pba_num, u32 pba_num_size);
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enum ice_status ice_init_nvm(struct ice_hw *hw);
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enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data);
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enum ice_status ice_read_sr_word_aq(struct ice_hw *hw, u16 offset, u16 *data);
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enum ice_status
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ice_read_sr_buf(struct ice_hw *hw, u16 offset, u16 *words, u16 *data);
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enum ice_status
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ice_aq_erase_nvm(struct ice_hw *hw, u16 module_typeid, struct ice_sq_cd *cd);
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enum ice_status
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ice_aq_read_nvm_cfg(struct ice_hw *hw, u8 cmd_flags, u16 field_id, void *data,
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u16 buf_size, u16 *elem_count, struct ice_sq_cd *cd);
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enum ice_status
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ice_aq_write_nvm_cfg(struct ice_hw *hw, u8 cmd_flags, void *data, u16 buf_size,
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u16 elem_count, struct ice_sq_cd *cd);
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#endif /* _ICE_NVM_H_ */
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