These ones were unambiguous cases where the Foundation was the only listed copyright holder (in the associated license block). Sponsored by: The FreeBSD Foundation
209 lines
5.6 KiB
C
209 lines
5.6 KiB
C
/*-
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* Copyright (c) 2015 The FreeBSD Foundation
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*
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* This software was developed by Semihalf under
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* the sponsorship of the FreeBSD Foundation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/* Common PCIe functions for Cavium Thunder SOC */
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_platform.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/intr.h>
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#ifdef FDT
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/ofw/ofw_pci.h>
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#endif
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#include <sys/pciio.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pci_private.h>
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#include <dev/pci/pcib_private.h>
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#include <dev/pci/pci_host_generic.h>
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#ifdef FDT
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#include <dev/pci/pci_host_generic_fdt.h>
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#endif
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#include "thunder_pcie_common.h"
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MALLOC_DEFINE(M_THUNDER_PCIE, "Thunder PCIe driver", "Thunder PCIe driver memory");
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#define THUNDER_CFG_BASE_TO_ECAM(x) ((((x) >> 36UL) & 0x3) | (((x) >> 42UL) & 0x4))
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uint32_t
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range_addr_is_pci(struct pcie_range *ranges, uint64_t addr, uint64_t size)
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{
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struct pcie_range *r;
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int tuple;
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for (tuple = 0; tuple < MAX_RANGES_TUPLES; tuple++) {
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r = &ranges[tuple];
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if (addr >= r->pci_base &&
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addr < (r->pci_base + r->size) &&
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size < r->size) {
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/* Address is within PCI range */
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return (1);
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}
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}
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/* Address is outside PCI range */
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return (0);
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}
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uint32_t
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range_addr_is_phys(struct pcie_range *ranges, uint64_t addr, uint64_t size)
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{
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struct pcie_range *r;
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int tuple;
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for (tuple = 0; tuple < MAX_RANGES_TUPLES; tuple++) {
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r = &ranges[tuple];
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if (addr >= r->phys_base &&
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addr < (r->phys_base + r->size) &&
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size < r->size) {
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/* Address is within Physical range */
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return (1);
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}
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}
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/* Address is outside Physical range */
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return (0);
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}
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uint64_t
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range_addr_phys_to_pci(struct pcie_range *ranges, uint64_t phys_addr)
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{
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struct pcie_range *r;
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uint64_t offset;
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int tuple;
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/* Find physical address corresponding to given bus address */
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for (tuple = 0; tuple < MAX_RANGES_TUPLES; tuple++) {
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r = &ranges[tuple];
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if (phys_addr >= r->phys_base &&
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phys_addr < (r->phys_base + r->size)) {
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/* Given phys addr is in this range.
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* Translate phys addr to bus addr.
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*/
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offset = phys_addr - r->phys_base;
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return (r->pci_base + offset);
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}
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}
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return (0);
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}
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uint64_t
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range_addr_pci_to_phys(struct pcie_range *ranges, uint64_t pci_addr)
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{
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struct pcie_range *r;
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uint64_t offset;
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int tuple;
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/* Find physical address corresponding to given bus address */
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for (tuple = 0; tuple < MAX_RANGES_TUPLES; tuple++) {
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r = &ranges[tuple];
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if (pci_addr >= r->pci_base &&
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pci_addr < (r->pci_base + r->size)) {
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/* Given pci addr is in this range.
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* Translate bus addr to phys addr.
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*/
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offset = pci_addr - r->pci_base;
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return (r->phys_base + offset);
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}
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}
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return (0);
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}
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int
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thunder_pcie_identify_ecam(device_t dev, int *ecam)
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{
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rman_res_t start;
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/* Check if we're running on Cavium ThunderX */
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if (!CPU_MATCH(CPU_IMPL_MASK | CPU_PART_MASK,
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CPU_IMPL_CAVIUM, CPU_PART_THUNDERX, 0, 0))
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return (EINVAL);
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start = bus_get_resource_start(dev, SYS_RES_MEMORY, 0);
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*ecam = THUNDER_CFG_BASE_TO_ECAM(start);
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device_printf(dev, "ThunderX quirk, setting ECAM to %d\n", *ecam);
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return (0);
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}
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#ifdef THUNDERX_PASS_1_1_ERRATA
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struct resource *
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thunder_pcie_alloc_resource(device_t dev, device_t child, int type, int *rid,
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rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
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{
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pci_addr_t map, testval;
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/*
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* If Enhanced Allocation is not used, we can't allocate any random
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* range. All internal devices have hardcoded place where they can
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* be located within PCI address space. Fortunately, we can read
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* this value from BAR.
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*/
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if (((type == SYS_RES_IOPORT) || (type == SYS_RES_MEMORY)) &&
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RMAN_IS_DEFAULT_RANGE(start, end)) {
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/* Read BAR manually to get resource address and size */
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pci_read_bar(child, *rid, &map, &testval, NULL);
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/* Mask the information bits */
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if (PCI_BAR_MEM(map))
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map &= PCIM_BAR_MEM_BASE;
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else
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map &= PCIM_BAR_IO_BASE;
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if (PCI_BAR_MEM(testval))
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testval &= PCIM_BAR_MEM_BASE;
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else
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testval &= PCIM_BAR_IO_BASE;
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start = map;
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end = start + count - 1;
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}
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return (pci_host_generic_core_alloc_resource(dev, child, type, rid,
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start, end, count, flags));
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}
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#endif
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