2ecbbcc7ca
For the Exception Syndrome Register, ESR_ELx, the upper 32b were previously unused, but now may contain additional exception info as of Armv8.7 (FEAT_LS64). Extend ESR from u32->u64 in exception handling code to support this. In addition, also extend Saved Program Status Register SPSR_ELx in the same way to allow for future extensions. Reviewed by: andrew Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D38983
94 lines
2.3 KiB
C
94 lines
2.3 KiB
C
/*-
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* Copyright (c) 2014 Andrew Turner
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* Copyright (c) 2014-2015 The FreeBSD Foundation
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* All rights reserved.
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*
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* This software was developed by Andrew Turner under
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* sponsorship from the FreeBSD Foundation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_REG_H_
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#define _MACHINE_REG_H_
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#include <sys/_types.h>
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struct reg {
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__uint64_t x[30];
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__uint64_t lr;
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__uint64_t sp;
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__uint64_t elr;
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__uint64_t spsr;
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};
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struct reg32 {
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unsigned int r[13];
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unsigned int r_sp;
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unsigned int r_lr;
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unsigned int r_pc;
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unsigned int r_cpsr;
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};
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struct fpreg {
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__uint128_t fp_q[32];
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__uint32_t fp_sr;
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__uint32_t fp_cr;
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};
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struct fpreg32 {
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int dummy;
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};
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struct dbreg {
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__uint8_t db_debug_ver;
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__uint8_t db_nbkpts;
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__uint8_t db_nwtpts;
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__uint8_t db_pad[5];
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struct {
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__uint64_t dbr_addr;
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__uint32_t dbr_ctrl;
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__uint32_t dbr_pad;
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} db_breakregs[16];
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struct {
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__uint64_t dbw_addr;
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__uint32_t dbw_ctrl;
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__uint32_t dbw_pad;
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} db_watchregs[16];
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};
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struct dbreg32 {
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int dummy;
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};
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struct arm64_addr_mask {
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__uint64_t code;
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__uint64_t data;
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};
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#define __HAVE_REG32
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#endif /* !_MACHINE_REG_H_ */
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