437 lines
11 KiB
C
437 lines
11 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2021 Alstom Group.
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* Copyright (c) 2021 Semihalf.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/conf.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/proc.h>
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#include <sys/rman.h>
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#include <sys/gpio.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <machine/stdarg.h>
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#include <dev/gpio/gpiobusvar.h>
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#include <dev/gpio/qoriq_gpio.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include "gpio_if.h"
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#include "pic_if.h"
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struct qoriq_gpio_pic_irqsrc {
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struct intr_irqsrc isrc;
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int pin;
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};
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struct qoriq_gpio_pic_softc {
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struct qoriq_gpio_softc base;
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struct resource *res_irq;
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void *irq_cookie;
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struct qoriq_gpio_pic_irqsrc isrcs[MAXPIN + 1];
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struct intr_map_data_gpio gdata;
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};
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#define RD4(sc, off) bus_read_4((sc)->base.sc_mem, (off))
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#define WR4(sc, off, data) bus_write_4((sc)->base.sc_mem, (off), (data))
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static device_probe_t qoriq_gpio_pic_probe;
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static device_attach_t qoriq_gpio_pic_attach;
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static device_detach_t qoriq_gpio_pic_detach;
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static void
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qoriq_gpio_pic_set_intr(struct qoriq_gpio_pic_softc *sc, int pin, bool enable)
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{
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uint32_t reg;
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reg = RD4(sc, GPIO_GPIMR);
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if (enable)
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reg |= BIT(31 - pin);
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else
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reg &= ~BIT(31 - pin);
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WR4(sc, GPIO_GPIMR, reg);
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}
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static void
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qoriq_gpio_pic_ack_intr(struct qoriq_gpio_pic_softc *sc, int pin)
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{
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uint32_t reg;
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reg = BIT(31 - pin);
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WR4(sc, GPIO_GPIER, reg);
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}
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static int
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qoriq_gpio_pic_intr(void *arg)
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{
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struct qoriq_gpio_pic_softc *sc;
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struct trapframe *tf;
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uint32_t status;
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int pin;
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sc = (struct qoriq_gpio_pic_softc *)arg;
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tf = curthread->td_intr_frame;
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status = RD4(sc, GPIO_GPIER);
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status &= RD4(sc, GPIO_GPIMR);
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while (status != 0) {
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pin = ffs(status) - 1;
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status &= ~BIT(pin);
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pin = 31 - pin;
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if (intr_isrc_dispatch(&sc->isrcs[pin].isrc, tf) != 0) {
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GPIO_LOCK(&sc->base);
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qoriq_gpio_pic_set_intr(sc, pin, false);
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qoriq_gpio_pic_ack_intr(sc, pin);
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GPIO_UNLOCK(&sc->base);
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device_printf(sc->base.dev,
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"Masking spurious pin interrupt %d\n",
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pin);
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}
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}
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return (FILTER_HANDLED);
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}
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static void
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qoriq_gpio_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
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{
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struct qoriq_gpio_pic_softc *sc;
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struct qoriq_gpio_pic_irqsrc *qisrc;
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sc = device_get_softc(dev);
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qisrc = (struct qoriq_gpio_pic_irqsrc *)isrc;
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GPIO_LOCK(&sc->base);
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qoriq_gpio_pic_set_intr(sc, qisrc->pin, false);
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GPIO_UNLOCK(&sc->base);
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}
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static void
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qoriq_gpio_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc)
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{
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struct qoriq_gpio_pic_softc *sc;
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struct qoriq_gpio_pic_irqsrc *qisrc;
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sc = device_get_softc(dev);
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qisrc = (struct qoriq_gpio_pic_irqsrc *)isrc;
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GPIO_LOCK(&sc->base);
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qoriq_gpio_pic_set_intr(sc, qisrc->pin, true);
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GPIO_UNLOCK(&sc->base);
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}
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static struct intr_map_data_gpio*
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qoriq_gpio_pic_convert_map_data(struct qoriq_gpio_pic_softc *sc, struct intr_map_data *data)
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{
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struct intr_map_data_gpio *gdata;
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struct intr_map_data_fdt *daf;
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switch (data->type) {
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case INTR_MAP_DATA_GPIO:
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gdata = (struct intr_map_data_gpio *)data;
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break;
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case INTR_MAP_DATA_FDT:
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daf = (struct intr_map_data_fdt *)data;
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if (daf->ncells != 2)
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return (NULL);
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gdata = &sc->gdata;
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gdata->gpio_pin_num = daf->cells[0];
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switch (daf->cells[1]) {
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case IRQ_TYPE_LEVEL_LOW:
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gdata->gpio_intr_mode = GPIO_INTR_LEVEL_LOW;
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break;
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case IRQ_TYPE_LEVEL_HIGH:
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gdata->gpio_intr_mode = GPIO_INTR_LEVEL_HIGH;
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break;
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case IRQ_TYPE_EDGE_RISING:
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gdata->gpio_intr_mode = GPIO_INTR_EDGE_RISING;
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break;
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case IRQ_TYPE_EDGE_FALLING:
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gdata->gpio_intr_mode = GPIO_INTR_EDGE_FALLING;
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break;
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case IRQ_TYPE_EDGE_BOTH:
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gdata->gpio_intr_mode = GPIO_INTR_EDGE_BOTH;
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break;
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default:
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return (NULL);
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}
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break;
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default:
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return (NULL);
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}
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return (gdata);
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}
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static int
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qoriq_gpio_pic_map_intr(device_t dev, struct intr_map_data *data,
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struct intr_irqsrc **isrcp)
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{
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struct qoriq_gpio_pic_softc *sc;
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struct intr_map_data_gpio *gdata;
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int pin;
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sc = device_get_softc(dev);
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gdata = qoriq_gpio_pic_convert_map_data(sc, data);
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if (gdata == NULL)
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return (EINVAL);
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pin = gdata->gpio_pin_num;
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if (pin > MAXPIN)
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return (EINVAL);
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*isrcp = &sc->isrcs[pin].isrc;
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return (0);
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}
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static int
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qoriq_gpio_pic_setup_intr(device_t dev, struct intr_irqsrc *isrc,
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struct resource *res, struct intr_map_data *data)
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{
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struct qoriq_gpio_pic_softc *sc;
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struct intr_map_data_gpio *gdata;
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struct qoriq_gpio_pic_irqsrc *qisrc;
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bool falling;
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uint32_t reg;
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sc = device_get_softc(dev);
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qisrc = (struct qoriq_gpio_pic_irqsrc *)isrc;
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gdata = qoriq_gpio_pic_convert_map_data(sc, data);
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if (gdata == NULL)
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return (EINVAL);
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if (gdata->gpio_intr_mode & GPIO_INTR_EDGE_BOTH)
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falling = false;
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else if (gdata->gpio_intr_mode & GPIO_INTR_EDGE_FALLING)
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falling = true;
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else
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return (EOPNOTSUPP);
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GPIO_LOCK(&sc->base);
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reg = RD4(sc, GPIO_GPICR);
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if (falling)
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reg |= BIT(31 - qisrc->pin);
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else
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reg &= ~BIT(31 - qisrc->pin);
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WR4(sc, GPIO_GPICR, reg);
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GPIO_UNLOCK(&sc->base);
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return (0);
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}
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static int
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qoriq_gpio_pic_teardown_intr(device_t dev, struct intr_irqsrc *isrc,
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struct resource *res, struct intr_map_data *data)
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{
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struct qoriq_gpio_pic_softc *sc;
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struct qoriq_gpio_pic_irqsrc *qisrc;
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sc = device_get_softc(dev);
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qisrc = (struct qoriq_gpio_pic_irqsrc *)isrc;
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if (isrc->isrc_handlers > 0)
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return (0);
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GPIO_LOCK(&sc->base);
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qoriq_gpio_pic_set_intr(sc, qisrc->pin, false);
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GPIO_UNLOCK(&sc->base);
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return (0);
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}
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static void
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qoriq_gpio_pic_post_filter(device_t dev, struct intr_irqsrc *isrc)
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{
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struct qoriq_gpio_pic_softc *sc;
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struct qoriq_gpio_pic_irqsrc *qisrc;
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sc = device_get_softc(dev);
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qisrc = (struct qoriq_gpio_pic_irqsrc *)isrc;
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GPIO_LOCK(&sc->base);
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qoriq_gpio_pic_ack_intr(sc, qisrc->pin);
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GPIO_UNLOCK(&sc->base);
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}
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static void
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qoriq_gpio_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
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{
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struct qoriq_gpio_pic_softc *sc;
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struct qoriq_gpio_pic_irqsrc *qisrc;
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sc = device_get_softc(dev);
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qisrc = (struct qoriq_gpio_pic_irqsrc *)isrc;
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GPIO_LOCK(&sc->base);
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qoriq_gpio_pic_ack_intr(sc, qisrc->pin);
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qoriq_gpio_pic_set_intr(sc, qisrc->pin, true);
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GPIO_UNLOCK(&sc->base);
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}
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static void
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qoriq_gpio_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
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{
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struct qoriq_gpio_pic_softc *sc;
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struct qoriq_gpio_pic_irqsrc *qisrc;
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sc = device_get_softc(dev);
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qisrc = (struct qoriq_gpio_pic_irqsrc *)isrc;
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GPIO_LOCK(&sc->base);
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qoriq_gpio_pic_set_intr(sc, qisrc->pin, false);
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GPIO_UNLOCK(&sc->base);
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}
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static int
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qoriq_gpio_pic_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "fsl,qoriq-gpio"))
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return (ENXIO);
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device_set_desc(dev, "Freescale QorIQ GPIO PIC driver");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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qoriq_gpio_pic_attach(device_t dev)
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{
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struct qoriq_gpio_pic_softc *sc;
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int error, rid, i;
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const char *name;
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intptr_t xref;
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sc = device_get_softc(dev);
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error = qoriq_gpio_attach(dev);
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if (error != 0)
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return (error);
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rid = 0;
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sc->res_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
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RF_ACTIVE | RF_SHAREABLE);
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if (sc->res_irq == NULL) {
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device_printf(dev, "Can't allocate interrupt resource.\n");
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error = ENOMEM;
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goto fail;
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}
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error = bus_setup_intr(dev, sc->res_irq, INTR_TYPE_MISC | INTR_MPSAFE,
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qoriq_gpio_pic_intr, NULL, sc, &sc->irq_cookie);
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if (error != 0) {
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device_printf(dev, "Failed to setup interrupt.\n");
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goto fail;
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}
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name = device_get_nameunit(dev);
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for (i = 0; i <= MAXPIN; i++) {
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sc->isrcs[i].pin = i;
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error = intr_isrc_register(&sc->isrcs[i].isrc,
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dev, 0, "%s,%u", name, i);
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if (error != 0)
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goto fail;
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}
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xref = OF_xref_from_node(ofw_bus_get_node(dev));
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if (intr_pic_register(dev, xref) == NULL) {
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error = ENXIO;
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goto fail;
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}
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/* ACK and mask all interrupts. */
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WR4(sc, GPIO_GPIER, 0xffffffff);
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WR4(sc, GPIO_GPIMR, 0);
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return (0);
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fail:
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qoriq_gpio_pic_detach(dev);
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return (error);
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}
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static int
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qoriq_gpio_pic_detach(device_t dev)
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{
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struct qoriq_gpio_pic_softc *sc;
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sc = device_get_softc(dev);
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if (sc->irq_cookie != NULL)
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bus_teardown_intr(dev, sc->res_irq, sc->irq_cookie);
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if (sc->res_irq != NULL)
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bus_release_resource(dev, SYS_RES_IRQ,
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rman_get_rid(sc->res_irq), sc->res_irq);
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return (qoriq_gpio_detach(dev));
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}
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static device_method_t qoriq_gpio_pic_methods[] = {
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DEVMETHOD(device_probe, qoriq_gpio_pic_probe),
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DEVMETHOD(device_attach, qoriq_gpio_pic_attach),
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DEVMETHOD(device_detach, qoriq_gpio_pic_detach),
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DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
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DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
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DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
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DEVMETHOD(pic_disable_intr, qoriq_gpio_pic_disable_intr),
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DEVMETHOD(pic_enable_intr, qoriq_gpio_pic_enable_intr),
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DEVMETHOD(pic_map_intr, qoriq_gpio_pic_map_intr),
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DEVMETHOD(pic_setup_intr, qoriq_gpio_pic_setup_intr),
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DEVMETHOD(pic_teardown_intr, qoriq_gpio_pic_teardown_intr),
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DEVMETHOD(pic_post_filter, qoriq_gpio_pic_post_filter),
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DEVMETHOD(pic_post_ithread, qoriq_gpio_pic_post_ithread),
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DEVMETHOD(pic_pre_ithread, qoriq_gpio_pic_pre_ithread),
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DEVMETHOD_END
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};
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DEFINE_CLASS_1(gpio, qoriq_gpio_pic_driver, qoriq_gpio_pic_methods,
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sizeof(struct qoriq_gpio_pic_softc), qoriq_gpio_driver);
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EARLY_DRIVER_MODULE(qoriq_gpio_pic, simplebus, qoriq_gpio_pic_driver, NULL, NULL,
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BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
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