54b96380f5
The SCMI specification describes a set of standard interfaces for power, performance and system management. SCMI is extensible and provides interfaces to access functions which are often implemented in firmwares in the System Control Processor (SCP). This implements Shared Memory-based transfer, which is one of the ways on how messages are exchanged between agents and the platform. This includes a driver for ARM Message Handling Unit (MHU) Doorbell, which is a mechanism that the caller can use to alert the callee of the presence of a message. The support implements clock management interface. For instance this allows us to control HDMI pixel clock on ARM Morello Board. Tested on ARM Morello Board. Obtained from: CheriBSD Differential Revision: https://reviews.freebsd.org/D37316 Reviewed by: manu Sponsored by: UKRI
165 lines
4.1 KiB
C
165 lines
4.1 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2022 Ruslan Bukin <br@bsdpad.com>
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*
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* This work was supported by Innovate UK project 105694, "Digital Security
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* by Design (DSbD) Technology Platform Prototype".
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <machine/bus.h>
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#include <dev/fdt/simplebus.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include "mmio_sram_if.h"
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#define dprintf(fmt, ...)
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static struct resource_spec mmio_sram_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE },
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{ -1, 0 }
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};
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struct mmio_sram_softc {
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struct simplebus_softc simplebus_sc;
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struct resource *res[1];
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device_t dev;
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};
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static int
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mmio_sram_probe(device_t dev)
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{
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if (!ofw_bus_is_compatible(dev, "mmio-sram"))
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return (ENXIO);
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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device_set_desc(dev, "MMIO SRAM");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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mmio_sram_attach(device_t dev)
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{
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struct mmio_sram_softc *sc;
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phandle_t node;
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sc = device_get_softc(dev);
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sc->dev = dev;
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if (bus_alloc_resources(dev, mmio_sram_spec, sc->res) != 0) {
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device_printf(dev, "Can't allocate resources for device.\n");
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return (ENXIO);
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}
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node = ofw_bus_get_node(dev);
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if (node == -1)
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return (ENXIO);
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simplebus_init(dev, node);
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/*
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* Allow devices to identify.
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*/
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bus_generic_probe(dev);
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/*
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* Now walk the OFW tree and attach top-level devices.
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*/
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for (node = OF_child(node); node > 0; node = OF_peer(node))
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simplebus_add_device(dev, node, 0, NULL, -1, NULL);
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return (bus_generic_attach(dev));
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}
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static int
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mmio_sram_detach(device_t dev)
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{
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struct mmio_sram_softc *sc;
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sc = device_get_softc(dev);
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bus_release_resources(dev, mmio_sram_spec, sc->res);
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return (0);
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}
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static uint8_t
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mmio_sram_read_1(device_t dev, bus_size_t offset)
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{
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struct mmio_sram_softc *sc;
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sc = device_get_softc(dev);
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dprintf("%s: reading from %lx\n", __func__, offset);
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return (bus_read_1(sc->res[0], offset));
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}
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static void
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mmio_sram_write_1(device_t dev, bus_size_t offset, uint8_t val)
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{
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struct mmio_sram_softc *sc;
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sc = device_get_softc(dev);
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dprintf("%s: writing to %lx val %x\n", __func__, offset, val);
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bus_write_1(sc->res[0], offset, val);
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}
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static device_method_t mmio_sram_methods[] = {
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/* Device Interface */
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DEVMETHOD(device_probe, mmio_sram_probe),
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DEVMETHOD(device_attach, mmio_sram_attach),
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DEVMETHOD(device_detach, mmio_sram_detach),
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/* MMIO interface */
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DEVMETHOD(mmio_sram_read_1, mmio_sram_read_1),
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DEVMETHOD(mmio_sram_write_1, mmio_sram_write_1),
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DEVMETHOD_END
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};
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DEFINE_CLASS_1(mmio_sram, mmio_sram_driver, mmio_sram_methods,
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sizeof(struct mmio_sram_softc), simplebus_driver);
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EARLY_DRIVER_MODULE(mmio_sram, simplebus, mmio_sram_driver, 0, 0,
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BUS_PASS_SUPPORTDEV + BUS_PASS_ORDER_MIDDLE);
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MODULE_VERSION(mmio_sram, 1);
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