49d9a59783
Summary:
Initial NUMA support:
- associate CPU with domain
- associate memory ranges with domain
- identify domain for devices
- limit device interrupt binding to appropriate domain
- Additionally fixes a bug in the setting of Maxmem which led to
only memory attached to the first socket being enabled for DMA
A pmap variant can opt in to numa support by by calling `numa_mem_regions`
at the end of pmap_bootstrap - registering the corresponding ranges with the
VM.
This yields a ~20% improvement in build times of llvm on dual socket POWER9
over non-NUMA.
Original patch by mmacy.
Differential Revision: https://reviews.freebsd.org/D17933
67 lines
2.4 KiB
C
67 lines
2.4 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (C) 2002 Benno Rice.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_INTR_MACHDEP_H_
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#define _MACHINE_INTR_MACHDEP_H_
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#define INTR_VECTORS 256
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#define MAX_PICS 32
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#define MAP_IRQ(node, pin) powerpc_get_irq(node, pin)
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/*
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* Default base address for MSI messages on PowerPC
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*/
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#define MSI_INTEL_ADDR_BASE 0xfee00000
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extern device_t root_pic;
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struct trapframe;
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driver_filter_t powerpc_ipi_handler;
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void intrcnt_add(const char *name, u_long **countp);
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u_int powerpc_register_pic(device_t, uint32_t, u_int, u_int, u_int);
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u_int powerpc_get_irq(uint32_t, u_int);
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void powerpc_dispatch_intr(u_int, struct trapframe *);
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int powerpc_enable_intr(void);
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int powerpc_setup_intr(const char *, u_int, driver_filter_t, driver_intr_t,
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void *, enum intr_type, void **, int);
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int powerpc_teardown_intr(void *);
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int powerpc_bind_intr(u_int irq, u_char cpu);
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int powerpc_config_intr(int, enum intr_trigger, enum intr_polarity);
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int powerpc_fw_config_intr(int irq, int sense_code);
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void powerpc_intr_mask(u_int irq);
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void powerpc_intr_unmask(u_int irq);
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#endif /* _MACHINE_INTR_MACHDEP_H_ */
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