299 lines
13 KiB
Diff
299 lines
13 KiB
Diff
Pull in r221170 from upstream clang trunk (by Roman Divacky):
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Implement vaarg lowering for ppc32. Lowering of scalars and
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aggregates is supported. Complex numbers are not.
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Pull in r221174 from upstream clang trunk (by Roman Divacky):
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Require asserts to unbreak the buildbots.
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Pull in r221284 from upstream clang trunk (by Roman Divacky):
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Rewrite the test to not require asserts.
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Pull in r221285 from upstream clang trunk (by Roman Divacky):
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Since the file has both ppc and ppc64 tests in it rename it.
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This adds va_args support for PowerPC (32 bit) to clang.
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Introduced here: http://svnweb.freebsd.org/changeset/base/275773
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Index: tools/clang/lib/CodeGen/TargetInfo.cpp
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===================================================================
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--- tools/clang/lib/CodeGen/TargetInfo.cpp
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+++ tools/clang/lib/CodeGen/TargetInfo.cpp
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@@ -2835,12 +2835,20 @@ llvm::Value *NaClX86_64ABIInfo::EmitVAArg(llvm::Va
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// PowerPC-32
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-
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namespace {
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-class PPC32TargetCodeGenInfo : public DefaultTargetCodeGenInfo {
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+/// PPC32_SVR4_ABIInfo - The 32-bit PowerPC ELF (SVR4) ABI information.
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+class PPC32_SVR4_ABIInfo : public DefaultABIInfo {
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public:
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- PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {}
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+ PPC32_SVR4_ABIInfo(CodeGen::CodeGenTypes &CGT) : DefaultABIInfo(CGT) {}
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+ llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
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+ CodeGenFunction &CGF) const override;
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+};
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+
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+class PPC32TargetCodeGenInfo : public TargetCodeGenInfo {
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+public:
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+ PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : TargetCodeGenInfo(new PPC32_SVR4_ABIInfo(CGT)) {}
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+
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int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const override {
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// This is recovered from gcc output.
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return 1; // r1 is the dedicated stack pointer
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@@ -2852,6 +2860,96 @@ namespace {
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}
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+llvm::Value *PPC32_SVR4_ABIInfo::EmitVAArg(llvm::Value *VAListAddr,
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+ QualType Ty,
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+ CodeGenFunction &CGF) const {
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+ if (const ComplexType *CTy = Ty->getAs<ComplexType>()) {
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+ // TODO: Implement this. For now ignore.
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+ (void)CTy;
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+ return nullptr;
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+ }
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+
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+ bool isI64 = Ty->isIntegerType() && getContext().getTypeSize(Ty) == 64;
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+ bool isInt = Ty->isIntegerType() || Ty->isPointerType() || Ty->isAggregateType();
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+ llvm::Type *CharPtr = CGF.Int8PtrTy;
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+ llvm::Type *CharPtrPtr = CGF.Int8PtrPtrTy;
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+
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+ CGBuilderTy &Builder = CGF.Builder;
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+ llvm::Value *GPRPtr = Builder.CreateBitCast(VAListAddr, CharPtr, "gprptr");
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+ llvm::Value *GPRPtrAsInt = Builder.CreatePtrToInt(GPRPtr, CGF.Int32Ty);
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+ llvm::Value *FPRPtrAsInt = Builder.CreateAdd(GPRPtrAsInt, Builder.getInt32(1));
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+ llvm::Value *FPRPtr = Builder.CreateIntToPtr(FPRPtrAsInt, CharPtr);
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+ llvm::Value *OverflowAreaPtrAsInt = Builder.CreateAdd(FPRPtrAsInt, Builder.getInt32(3));
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+ llvm::Value *OverflowAreaPtr = Builder.CreateIntToPtr(OverflowAreaPtrAsInt, CharPtrPtr);
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+ llvm::Value *RegsaveAreaPtrAsInt = Builder.CreateAdd(OverflowAreaPtrAsInt, Builder.getInt32(4));
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+ llvm::Value *RegsaveAreaPtr = Builder.CreateIntToPtr(RegsaveAreaPtrAsInt, CharPtrPtr);
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+ llvm::Value *GPR = Builder.CreateLoad(GPRPtr, false, "gpr");
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+ // Align GPR when TY is i64.
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+ if (isI64) {
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+ llvm::Value *GPRAnd = Builder.CreateAnd(GPR, Builder.getInt8(1));
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+ llvm::Value *CC64 = Builder.CreateICmpEQ(GPRAnd, Builder.getInt8(1));
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+ llvm::Value *GPRPlusOne = Builder.CreateAdd(GPR, Builder.getInt8(1));
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+ GPR = Builder.CreateSelect(CC64, GPRPlusOne, GPR);
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+ }
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+ llvm::Value *FPR = Builder.CreateLoad(FPRPtr, false, "fpr");
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+ llvm::Value *OverflowArea = Builder.CreateLoad(OverflowAreaPtr, false, "overflow_area");
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+ llvm::Value *OverflowAreaAsInt = Builder.CreatePtrToInt(OverflowArea, CGF.Int32Ty);
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+ llvm::Value *RegsaveArea = Builder.CreateLoad(RegsaveAreaPtr, false, "regsave_area");
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+ llvm::Value *RegsaveAreaAsInt = Builder.CreatePtrToInt(RegsaveArea, CGF.Int32Ty);
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+
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+ llvm::Value *CC = Builder.CreateICmpULT(isInt ? GPR : FPR,
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+ Builder.getInt8(8), "cond");
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+
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+ llvm::Value *RegConstant = Builder.CreateMul(isInt ? GPR : FPR,
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+ Builder.getInt8(isInt ? 4 : 8));
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+
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+ llvm::Value *OurReg = Builder.CreateAdd(RegsaveAreaAsInt, Builder.CreateSExt(RegConstant, CGF.Int32Ty));
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+
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+ if (Ty->isFloatingType())
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+ OurReg = Builder.CreateAdd(OurReg, Builder.getInt32(32));
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+
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+ llvm::BasicBlock *UsingRegs = CGF.createBasicBlock("using_regs");
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+ llvm::BasicBlock *UsingOverflow = CGF.createBasicBlock("using_overflow");
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+ llvm::BasicBlock *Cont = CGF.createBasicBlock("cont");
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+
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+ Builder.CreateCondBr(CC, UsingRegs, UsingOverflow);
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+
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+ CGF.EmitBlock(UsingRegs);
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+
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+ llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
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+ llvm::Value *Result1 = Builder.CreateIntToPtr(OurReg, PTy);
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+ // Increase the GPR/FPR indexes.
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+ if (isInt) {
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+ GPR = Builder.CreateAdd(GPR, Builder.getInt8(isI64 ? 2 : 1));
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+ Builder.CreateStore(GPR, GPRPtr);
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+ } else {
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+ FPR = Builder.CreateAdd(FPR, Builder.getInt8(1));
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+ Builder.CreateStore(FPR, FPRPtr);
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+ }
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+ CGF.EmitBranch(Cont);
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+
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+ CGF.EmitBlock(UsingOverflow);
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+
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+ // Increase the overflow area.
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+ llvm::Value *Result2 = Builder.CreateIntToPtr(OverflowAreaAsInt, PTy);
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+ OverflowAreaAsInt = Builder.CreateAdd(OverflowAreaAsInt, Builder.getInt32(isInt ? 4 : 8));
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+ Builder.CreateStore(Builder.CreateIntToPtr(OverflowAreaAsInt, CharPtr), OverflowAreaPtr);
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+ CGF.EmitBranch(Cont);
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+
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+ CGF.EmitBlock(Cont);
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+
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+ llvm::PHINode *Result = CGF.Builder.CreatePHI(PTy, 2, "vaarg.addr");
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+ Result->addIncoming(Result1, UsingRegs);
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+ Result->addIncoming(Result2, UsingOverflow);
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+
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+ if (Ty->isAggregateType()) {
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+ llvm::Value *AGGPtr = Builder.CreateBitCast(Result, CharPtrPtr, "aggrptr") ;
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+ return Builder.CreateLoad(AGGPtr, false, "aggr");
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+ }
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+
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+ return Result;
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+}
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+
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bool
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PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
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llvm::Value *Address) const {
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Index: tools/clang/test/CodeGen/ppc-varargs-struct.c
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===================================================================
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--- tools/clang/test/CodeGen/ppc-varargs-struct.c
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+++ tools/clang/test/CodeGen/ppc-varargs-struct.c
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@@ -0,0 +1,112 @@
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+// REQUIRES: powerpc-registered-target
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+// REQUIRES: asserts
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+// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s
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+// RUN: %clang_cc1 -triple powerpc-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-PPC
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+
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+#include <stdarg.h>
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+
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+struct x {
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+ long a;
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+ double b;
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+};
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+
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+void testva (int n, ...)
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+{
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+ va_list ap;
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+
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+ struct x t = va_arg (ap, struct x);
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+// CHECK: bitcast i8* %{{[a-z.0-9]*}} to %struct.x*
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+// CHECK: bitcast %struct.x* %t to i8*
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+// CHECK: bitcast %struct.x* %{{[0-9]+}} to i8*
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+// CHECK: call void @llvm.memcpy
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+// CHECK-PPC: [[ARRAYDECAY:%[a-z0-9]+]] = getelementptr inbounds [1 x %struct.__va_list_tag]* %ap, i32 0, i32 0
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+// CHECK-PPC-NEXT: [[GPRPTR:%[a-z0-9]+]] = bitcast %struct.__va_list_tag* [[ARRAYDECAY]] to i8*
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+// CHECK-PPC-NEXT: [[ZERO:%[0-9]+]] = ptrtoint i8* [[GPRPTR]] to i32
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+// CHECK-PPC-NEXT: [[ONE:%[0-9]+]] = add i32 [[ZERO]], 1
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+// CHECK-PPC-NEXT: [[TWO:%[0-9]+]] = inttoptr i32 [[ONE]] to i8*
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+// CHECK-PPC-NEXT: [[THREE:%[0-9]+]] = add i32 [[ONE]], 3
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+// CHECK-PPC-NEXT: [[FOUR:%[0-9]+]] = inttoptr i32 [[THREE]] to i8**
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+// CHECK-PPC-NEXT: [[FIVE:%[0-9]+]] = add i32 [[THREE]], 4
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+// CHECK-PPC-NEXT: [[SIX:%[0-9]+]] = inttoptr i32 [[FIVE]] to i8**
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+// CHECK-PPC-NEXT: [[GPR:%[a-z0-9]+]] = load i8* [[GPRPTR]]
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+// CHECK-PPC-NEXT: [[FPR:%[a-z0-9]+]] = load i8* [[TWO]]
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+// CHECK-PPC-NEXT: [[OVERFLOW_AREA:%[a-z_0-9]+]] = load i8** [[FOUR]]
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+// CHECK-PPC-NEXT: [[SEVEN:%[0-9]+]] = ptrtoint i8* [[OVERFLOW_AREA]] to i32
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+// CHECK-PPC-NEXT: [[REGSAVE_AREA:%[a-z_0-9]+]] = load i8** [[SIX]]
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+// CHECK-PPC-NEXT: [[EIGHT:%[0-9]+]] = ptrtoint i8* [[REGSAVE_AREA]] to i32
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+// CHECK-PPC-NEXT: [[COND:%[a-z0-9]+]] = icmp ult i8 [[GPR]], 8
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+// CHECK-PPC-NEXT: [[NINE:%[0-9]+]] = mul i8 [[GPR]], 4
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+// CHECK-PPC-NEXT: [[TEN:%[0-9]+]] = sext i8 [[NINE]] to i32
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+// CHECK-PPC-NEXT: [[ELEVEN:%[0-9]+]] = add i32 [[EIGHT]], [[TEN]]
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+// CHECK-PPC-NEXT: br i1 [[COND]], label [[USING_REGS:%[a-z_0-9]+]], label [[USING_OVERFLOW:%[a-z_0-9]+]]
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+//
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+// CHECK-PPC1:[[USING_REGS]]
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+// CHECK-PPC: [[TWELVE:%[0-9]+]] = inttoptr i32 [[ELEVEN]] to %struct.x*
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+// CHECK-PPC-NEXT: [[THIRTEEN:%[0-9]+]] = add i8 [[GPR]], 1
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+// CHECK-PPC-NEXT: store i8 [[THIRTEEN]], i8* [[GPRPTR]]
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+// CHECK-PPC-NEXT: br label [[CONT:%[a-z0-9]+]]
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+//
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+// CHECK-PPC1:[[USING_OVERFLOW]]
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+// CHECK-PPC: [[FOURTEEN:%[0-9]+]] = inttoptr i32 [[SEVEN]] to %struct.x*
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+// CHECK-PPC-NEXT: [[FIFTEEN:%[0-9]+]] = add i32 [[SEVEN]], 4
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+// CHECK-PPC-NEXT: [[SIXTEEN:%[0-9]+]] = inttoptr i32 [[FIFTEEN]] to i8*
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+// CHECK-PPC-NEXT: store i8* [[SIXTEEN]], i8** [[FOUR]]
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+// CHECK-PPC-NEXT: br label [[CONT]]
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+//
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+// CHECK-PPC1:[[CONT]]
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+// CHECK-PPC: [[VAARG_ADDR:%[a-z.0-9]+]] = phi %struct.x* [ [[TWELVE]], [[USING_REGS]] ], [ [[FOURTEEN]], [[USING_OVERFLOW]] ]
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+// CHECK-PPC-NEXT: [[AGGRPTR:%[a-z0-9]+]] = bitcast %struct.x* [[VAARG_ADDR]] to i8**
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+// CHECK-PPC-NEXT: [[AGGR:%[a-z0-9]+]] = load i8** [[AGGRPTR]]
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+// CHECK-PPC-NEXT: [[SEVENTEEN:%[0-9]+]] = bitcast %struct.x* %t to i8*
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+// CHECK-PPC-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* [[SEVENTEEN]], i8* [[AGGR]], i32 16, i32 8, i1 false)
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+
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+ int v = va_arg (ap, int);
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+// CHECK: ptrtoint i8* %{{[a-z.0-9]*}} to i64
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+// CHECK: add i64 %{{[0-9]+}}, 4
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+// CHECK: inttoptr i64 %{{[0-9]+}} to i8*
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+// CHECK: bitcast i8* %{{[0-9]+}} to i32*
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+// CHECK-PPC: [[ARRAYDECAY1:%[a-z0-9]+]] = getelementptr inbounds [1 x %struct.__va_list_tag]* %ap, i32 0, i32 0
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+// CHECK-PPC-NEXT: [[GPRPTR1:%[a-z0-9]+]] = bitcast %struct.__va_list_tag* [[ARRAYDECAY1]] to i8*
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+// CHECK-PPC-NEXT: [[EIGHTEEN:%[0-9]+]] = ptrtoint i8* [[GPRPTR1]] to i32
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+// CHECK-PPC-NEXT: [[NINETEEN:%[0-9]+]] = add i32 [[EIGHTEEN]], 1
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+// CHECK-PPC-NEXT: [[TWENTY:%[0-9]+]] = inttoptr i32 [[NINETEEN]] to i8*
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+// CHECK-PPC-NEXT: [[TWENTYONE:%[0-9]+]] = add i32 [[NINETEEN]], 3
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+// CHECK-PPC-NEXT: [[TWENTYTWO:%[0-9]+]] = inttoptr i32 [[TWENTYONE]] to i8**
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+// CHECK-PPC-NEXT: [[TWENTYTHREE:%[0-9]+]] = add i32 [[TWENTYONE]], 4
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+// CHECK-PPC-NEXT: [[TWENTYFOUR:%[0-9]+]] = inttoptr i32 [[TWENTYTHREE]] to i8**
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+// CHECK-PPC-NEXT: [[GPR1:%[a-z0-9]+]] = load i8* [[GPRPTR1]]
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+// CHECK-PPC-NEXT: [[FPR1:%[a-z0-9]+]] = load i8* [[TWENTY]]
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+// CHECK-PPC-NEXT: [[OVERFLOW_AREA1:%[a-z_0-9]+]] = load i8** [[TWENTYTWO]]
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+// CHECK-PPC-NEXT: [[TWENTYFIVE:%[0-9]+]] = ptrtoint i8* [[OVERFLOW_AREA1]] to i32
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+// CHECK-PPC-NEXT: [[REGSAVE_AREA1:%[a-z_0-9]+]] = load i8** [[TWENTYFOUR]]
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+// CHECK-PPC-NEXT: [[TWENTYSIX:%[0-9]+]] = ptrtoint i8* [[REGSAVE_AREA1]] to i32
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+// CHECK-PPC-NEXT: [[COND1:%[a-z0-9]+]] = icmp ult i8 [[GPR1]], 8
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+// CHECK-PPC-NEXT: [[TWENTYSEVEN:%[0-9]+]] = mul i8 [[GPR1]], 4
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+// CHECK-PPC-NEXT: [[TWENTYEIGHT:%[0-9]+]] = sext i8 [[TWENTYSEVEN]] to i32
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+// CHECK-PPC-NEXT: [[TWENTYNINE:%[0-9]+]] = add i32 [[TWENTYSIX]], [[TWENTYEIGHT]]
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+// CHECK-PPC-NEXT: br i1 [[COND1]], label [[USING_REGS1:%[a-z_0-9]+]], label [[USING_OVERFLOW1:%[a-z_0-9]+]]
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+//
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+// CHECK-PPC1:[[USING_REGS1]]:
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+// CHECK-PPC: [[THIRTY:%[0-9]+]] = inttoptr i32 [[TWENTYNINE]] to i32*
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+// CHECK-PPC-NEXT: [[THIRTYONE:%[0-9]+]] = add i8 [[GPR1]], 1
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+// CHECK-PPC-NEXT: store i8 [[THIRTYONE]], i8* [[GPRPTR1]]
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+// CHECK-PPC-NEXT: br label [[CONT1:%[a-z0-9]+]]
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+//
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+// CHECK-PPC1:[[USING_OVERFLOW1]]:
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+// CHECK-PPC: [[THIRTYTWO:%[0-9]+]] = inttoptr i32 [[TWENTYFIVE]] to i32*
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+// CHECK-PPC-NEXT: [[THIRTYTHREE:%[0-9]+]] = add i32 [[TWENTYFIVE]], 4
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+// CHECK-PPC-NEXT: [[THIRTYFOUR:%[0-9]+]] = inttoptr i32 [[THIRTYTHREE]] to i8*
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+// CHECK-PPC-NEXT: store i8* [[THIRTYFOUR]], i8** [[TWENTYTWO]]
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+// CHECK-PPC-NEXT: br label [[CONT1]]
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+//
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+// CHECK-PPC1:[[CONT1]]:
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+// CHECK-PPC: [[VAARG_ADDR1:%[a-z.0-9]+]] = phi i32* [ [[THIRTY]], [[USING_REGS1]] ], [ [[THIRTYTWO]], [[USING_OVERFLOW1]] ]
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+// CHECK-PPC-NEXT: [[THIRTYFIVE:%[0-9]+]] = load i32* [[VAARG_ADDR1]]
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+// CHECK-PPC-NEXT: store i32 [[THIRTYFIVE]], i32* %v, align 4
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+
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+#ifdef __powerpc64__
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+ __int128_t u = va_arg (ap, __int128_t);
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+#endif
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+// CHECK: bitcast i8* %{{[a-z.0-9]+}} to i128*
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+// CHECK-NEXT: load i128* %{{[0-9]+}}
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+}
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Index: tools/clang/test/CodeGen/ppc64-varargs-struct.c
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===================================================================
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--- tools/clang/test/CodeGen/ppc64-varargs-struct.c
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+++ tools/clang/test/CodeGen/ppc64-varargs-struct.c
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@@ -1,30 +0,0 @@
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-// REQUIRES: powerpc-registered-target
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-// RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s
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-
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-#include <stdarg.h>
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-
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-struct x {
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- long a;
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- double b;
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-};
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-
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-void testva (int n, ...)
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-{
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- va_list ap;
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-
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- struct x t = va_arg (ap, struct x);
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-// CHECK: bitcast i8* %{{[a-z.0-9]*}} to %struct.x*
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-// CHECK: bitcast %struct.x* %t to i8*
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-// CHECK: bitcast %struct.x* %{{[0-9]+}} to i8*
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-// CHECK: call void @llvm.memcpy
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-
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- int v = va_arg (ap, int);
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-// CHECK: ptrtoint i8* %{{[a-z.0-9]*}} to i64
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-// CHECK: add i64 %{{[0-9]+}}, 4
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-// CHECK: inttoptr i64 %{{[0-9]+}} to i8*
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-// CHECK: bitcast i8* %{{[0-9]+}} to i32*
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-
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- __int128_t u = va_arg (ap, __int128_t);
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-// CHECK: bitcast i8* %{{[a-z.0-9]+}} to i128*
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-// CHECK-NEXT: load i128* %{{[0-9]+}}
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-}
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