45d426a34e
mips32r2 and mips64r2 (and close relatives) processors. There presently is support for ADMtek ADM5120, A mips 4Kc in a malta board, the RB533 routerboard (based on IDT RC32434) and some preliminary support for sibtye/broadcom designs. Other hardware support will be forthcomcing. This port boots multiuser under gxemul emulating the malta board and also bootstraps on the hardware whose support is forthcoming... Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard, Randall Stewert and others that have contributed to the mips2 and/or mips2-jnpr perforce branches. Juniper contirbuted a generic mips port late in the life cycle of the misp2 branch. Warner Losh merged the mips2 and Juniper code bases, and others list above have worked for the past several months to get to multiuser. In addition, the mips2 work owe a debt to the trail blazing efforts of the original mips branch in perforce done by Juli Mallett.
139 lines
3.8 KiB
C
139 lines
3.8 KiB
C
/* $OpenBSD: frame.h,v 1.3 1998/09/15 10:50:12 pefo Exp $ */
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/*-
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* Copyright (c) 1998 Per Fogelstrom, Opsycon AB
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed under OpenBSD by
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* Per Fogelstrom, Opsycon AB, Sweden.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
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* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* JNPR: frame.h,v 1.6.2.1 2007/09/10 08:14:57 girish
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* $FreeBSD$
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*
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*/
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#ifndef _MACHINE_FRAME_H_
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#define _MACHINE_FRAME_H_
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struct trapframe {
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register_t zero;
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register_t ast;
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register_t v0;
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register_t v1;
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register_t a0;
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register_t a1;
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register_t a2;
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register_t a3;
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register_t t0;
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register_t t1;
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register_t t2;
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register_t t3;
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register_t t4;
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register_t t5;
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register_t t6;
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register_t t7;
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register_t s0;
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register_t s1;
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register_t s2;
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register_t s3;
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register_t s4;
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register_t s5;
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register_t s6;
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register_t s7;
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register_t t8;
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register_t t9;
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register_t k0;
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register_t k1;
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register_t gp;
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register_t sp;
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register_t s8;
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register_t ra;
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register_t sr;
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register_t mullo;
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register_t mulhi;
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register_t badvaddr;
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register_t cause;
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register_t pc;
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/*
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* FREEBSD_DEVELOPERS_FIXME:
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* Include any other registers which are CPU-Specific and
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* need to be part of the frame here.
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*
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* Also, be sure this matches what is defined in regnum.h
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*/
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register_t ic; /* RM7k and RM9k specific */
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register_t dummy; /* Alignment for 32-bit case */
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/* From here and on, only saved user processes. */
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f_register_t f0;
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f_register_t f1;
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f_register_t f2;
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f_register_t f3;
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f_register_t f4;
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f_register_t f5;
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f_register_t f6;
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f_register_t f7;
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f_register_t f8;
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f_register_t f9;
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f_register_t f10;
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f_register_t f11;
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f_register_t f12;
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f_register_t f13;
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f_register_t f14;
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f_register_t f15;
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f_register_t f16;
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f_register_t f17;
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f_register_t f18;
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f_register_t f19;
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f_register_t f20;
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f_register_t f21;
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f_register_t f22;
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f_register_t f23;
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f_register_t f24;
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f_register_t f25;
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f_register_t f26;
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f_register_t f27;
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f_register_t f28;
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f_register_t f29;
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f_register_t f30;
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f_register_t f31;
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register_t fsr;
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register_t fdummy;
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/*
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* COP2 registers may need to be saved here based on the CPU, and those
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* might need to be per process, or even for the kernel, so we need
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* some thought here.
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*/
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};
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/* REVISIT */
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struct frame *get_current_fp __P((void));
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#define get_next_fp(fp) (0)
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#define get_return_ptr(fp) (0)
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void get_stack_trace(u_int32_t depth, u_int32_t *trace);
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#endif /* !_MACHINE_FRAME_H_ */
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