660 lines
19 KiB
C++
660 lines
19 KiB
C++
//===- X86DisassemblerTables.cpp - Disassembler tables ----------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file is part of the X86 Disassembler Emitter.
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// It contains the implementation of the disassembler tables.
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// Documentation for the disassembler emitter in general can be found in
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// X86DisasemblerEmitter.h.
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//
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//===----------------------------------------------------------------------===//
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#include "X86DisassemblerShared.h"
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#include "X86DisassemblerTables.h"
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#include "TableGenBackend.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/Format.h"
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using namespace llvm;
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using namespace X86Disassembler;
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/// inheritsFrom - Indicates whether all instructions in one class also belong
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/// to another class.
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///
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/// @param child - The class that may be the subset
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/// @param parent - The class that may be the superset
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/// @return - True if child is a subset of parent, false otherwise.
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static inline bool inheritsFrom(InstructionContext child,
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InstructionContext parent) {
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if (child == parent)
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return true;
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switch (parent) {
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case IC:
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return true;
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case IC_64BIT:
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return(inheritsFrom(child, IC_64BIT_REXW) ||
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inheritsFrom(child, IC_64BIT_OPSIZE) ||
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inheritsFrom(child, IC_64BIT_XD) ||
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inheritsFrom(child, IC_64BIT_XS));
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case IC_OPSIZE:
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return(inheritsFrom(child, IC_64BIT_OPSIZE));
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case IC_XD:
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return(inheritsFrom(child, IC_64BIT_XD) ||
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inheritsFrom(child, IC_VEX_XD));
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case IC_XS:
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return(inheritsFrom(child, IC_64BIT_XS) ||
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inheritsFrom(child, IC_VEX_XS));
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case IC_64BIT_REXW:
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return(inheritsFrom(child, IC_64BIT_REXW_XS) ||
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inheritsFrom(child, IC_64BIT_REXW_XD) ||
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inheritsFrom(child, IC_64BIT_REXW_OPSIZE));
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case IC_64BIT_OPSIZE:
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return(inheritsFrom(child, IC_64BIT_REXW_OPSIZE));
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case IC_64BIT_XD:
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return(inheritsFrom(child, IC_64BIT_REXW_XD));
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case IC_64BIT_XS:
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return(inheritsFrom(child, IC_64BIT_REXW_XS));
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case IC_64BIT_REXW_XD:
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return false;
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case IC_64BIT_REXW_XS:
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return false;
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case IC_64BIT_REXW_OPSIZE:
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return false;
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case IC_VEX:
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return(inheritsFrom(child, IC_VEX_XS) ||
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inheritsFrom(child, IC_VEX_XD) ||
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inheritsFrom(child, IC_VEX_L) ||
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inheritsFrom(child, IC_VEX_W) ||
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inheritsFrom(child, IC_VEX_OPSIZE));
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case IC_VEX_XS:
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return(inheritsFrom(child, IC_VEX_L_XS) ||
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inheritsFrom(child, IC_VEX_W_XS));
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case IC_VEX_XD:
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return(inheritsFrom(child, IC_VEX_L_XD) ||
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inheritsFrom(child, IC_VEX_W_XD));
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case IC_VEX_L:
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return(inheritsFrom(child, IC_VEX_L_XS) ||
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inheritsFrom(child, IC_VEX_L_XD));
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case IC_VEX_L_XS:
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return false;
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case IC_VEX_L_XD:
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return false;
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case IC_VEX_W:
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return(inheritsFrom(child, IC_VEX_W_XS) ||
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inheritsFrom(child, IC_VEX_W_XD) ||
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inheritsFrom(child, IC_VEX_W_OPSIZE));
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case IC_VEX_W_XS:
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return false;
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case IC_VEX_W_XD:
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return false;
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case IC_VEX_OPSIZE:
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return inheritsFrom(child, IC_VEX_W_OPSIZE);
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default:
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return false;
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}
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}
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/// outranks - Indicates whether, if an instruction has two different applicable
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/// classes, which class should be preferred when performing decode. This
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/// imposes a total ordering (ties are resolved toward "lower")
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///
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/// @param upper - The class that may be preferable
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/// @param lower - The class that may be less preferable
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/// @return - True if upper is to be preferred, false otherwise.
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static inline bool outranks(InstructionContext upper,
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InstructionContext lower) {
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assert(upper < IC_max);
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assert(lower < IC_max);
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#define ENUM_ENTRY(n, r, d) r,
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static int ranks[IC_max] = {
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INSTRUCTION_CONTEXTS
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};
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#undef ENUM_ENTRY
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return (ranks[upper] > ranks[lower]);
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}
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/// stringForContext - Returns a string containing the name of a particular
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/// InstructionContext, usually for diagnostic purposes.
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///
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/// @param insnContext - The instruction class to transform to a string.
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/// @return - A statically-allocated string constant that contains the
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/// name of the instruction class.
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static inline const char* stringForContext(InstructionContext insnContext) {
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switch (insnContext) {
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default:
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llvm_unreachable("Unhandled instruction class");
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#define ENUM_ENTRY(n, r, d) case n: return #n; break;
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INSTRUCTION_CONTEXTS
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#undef ENUM_ENTRY
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}
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return 0;
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}
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/// stringForOperandType - Like stringForContext, but for OperandTypes.
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static inline const char* stringForOperandType(OperandType type) {
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switch (type) {
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default:
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llvm_unreachable("Unhandled type");
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#define ENUM_ENTRY(i, d) case i: return #i;
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TYPES
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#undef ENUM_ENTRY
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}
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}
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/// stringForOperandEncoding - like stringForContext, but for
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/// OperandEncodings.
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static inline const char* stringForOperandEncoding(OperandEncoding encoding) {
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switch (encoding) {
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default:
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llvm_unreachable("Unhandled encoding");
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#define ENUM_ENTRY(i, d) case i: return #i;
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ENCODINGS
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#undef ENUM_ENTRY
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}
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}
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void DisassemblerTables::emitOneID(raw_ostream &o,
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uint32_t &i,
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InstrUID id,
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bool addComma) const {
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if (id)
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o.indent(i * 2) << format("0x%hx", id);
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else
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o.indent(i * 2) << 0;
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if (addComma)
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o << ", ";
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else
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o << " ";
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o << "/* ";
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o << InstructionSpecifiers[id].name;
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o << "*/";
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o << "\n";
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}
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/// emitEmptyTable - Emits the modRMEmptyTable, which is used as a ID table by
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/// all ModR/M decisions for instructions that are invalid for all possible
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/// ModR/M byte values.
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///
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/// @param o - The output stream on which to emit the table.
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/// @param i - The indentation level for that output stream.
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static void emitEmptyTable(raw_ostream &o, uint32_t &i)
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{
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o.indent(i * 2) << "static const InstrUID modRMEmptyTable[1] = { 0 };\n";
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o << "\n";
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}
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/// getDecisionType - Determines whether a ModRM decision with 255 entries can
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/// be compacted by eliminating redundant information.
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///
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/// @param decision - The decision to be compacted.
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/// @return - The compactest available representation for the decision.
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static ModRMDecisionType getDecisionType(ModRMDecision &decision)
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{
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bool satisfiesOneEntry = true;
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bool satisfiesSplitRM = true;
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uint16_t index;
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for (index = 0; index < 256; ++index) {
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if (decision.instructionIDs[index] != decision.instructionIDs[0])
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satisfiesOneEntry = false;
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if (((index & 0xc0) == 0xc0) &&
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(decision.instructionIDs[index] != decision.instructionIDs[0xc0]))
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satisfiesSplitRM = false;
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if (((index & 0xc0) != 0xc0) &&
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(decision.instructionIDs[index] != decision.instructionIDs[0x00]))
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satisfiesSplitRM = false;
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}
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if (satisfiesOneEntry)
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return MODRM_ONEENTRY;
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if (satisfiesSplitRM)
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return MODRM_SPLITRM;
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return MODRM_FULL;
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}
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/// stringForDecisionType - Returns a statically-allocated string corresponding
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/// to a particular decision type.
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///
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/// @param dt - The decision type.
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/// @return - A pointer to the statically-allocated string (e.g.,
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/// "MODRM_ONEENTRY" for MODRM_ONEENTRY).
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static const char* stringForDecisionType(ModRMDecisionType dt)
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{
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#define ENUM_ENTRY(n) case n: return #n;
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switch (dt) {
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default:
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llvm_unreachable("Unknown decision type");
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MODRMTYPES
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};
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#undef ENUM_ENTRY
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}
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/// stringForModifierType - Returns a statically-allocated string corresponding
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/// to an opcode modifier type.
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///
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/// @param mt - The modifier type.
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/// @return - A pointer to the statically-allocated string (e.g.,
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/// "MODIFIER_NONE" for MODIFIER_NONE).
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static const char* stringForModifierType(ModifierType mt)
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{
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#define ENUM_ENTRY(n) case n: return #n;
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switch(mt) {
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default:
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llvm_unreachable("Unknown modifier type");
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MODIFIER_TYPES
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};
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#undef ENUM_ENTRY
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}
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DisassemblerTables::DisassemblerTables() {
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unsigned i;
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for (i = 0; i < array_lengthof(Tables); i++) {
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Tables[i] = new ContextDecision;
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memset(Tables[i], 0, sizeof(ContextDecision));
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}
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HasConflicts = false;
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}
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DisassemblerTables::~DisassemblerTables() {
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unsigned i;
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for (i = 0; i < array_lengthof(Tables); i++)
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delete Tables[i];
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}
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void DisassemblerTables::emitModRMDecision(raw_ostream &o1,
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raw_ostream &o2,
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uint32_t &i1,
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uint32_t &i2,
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ModRMDecision &decision)
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const {
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static uint64_t sTableNumber = 0;
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uint64_t thisTableNumber = sTableNumber;
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ModRMDecisionType dt = getDecisionType(decision);
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uint16_t index;
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if (dt == MODRM_ONEENTRY && decision.instructionIDs[0] == 0)
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{
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o2.indent(i2) << "{ /* ModRMDecision */" << "\n";
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i2++;
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o2.indent(i2) << stringForDecisionType(dt) << "," << "\n";
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o2.indent(i2) << "modRMEmptyTable";
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i2--;
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o2.indent(i2) << "}";
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return;
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}
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o1.indent(i1) << "static const InstrUID modRMTable" << thisTableNumber;
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switch (dt) {
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default:
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llvm_unreachable("Unknown decision type");
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case MODRM_ONEENTRY:
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o1 << "[1]";
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break;
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case MODRM_SPLITRM:
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o1 << "[2]";
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break;
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case MODRM_FULL:
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o1 << "[256]";
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break;
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}
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o1 << " = {" << "\n";
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i1++;
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switch (dt) {
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default:
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llvm_unreachable("Unknown decision type");
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case MODRM_ONEENTRY:
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emitOneID(o1, i1, decision.instructionIDs[0], false);
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break;
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case MODRM_SPLITRM:
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emitOneID(o1, i1, decision.instructionIDs[0x00], true); // mod = 0b00
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emitOneID(o1, i1, decision.instructionIDs[0xc0], false); // mod = 0b11
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break;
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case MODRM_FULL:
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for (index = 0; index < 256; ++index)
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emitOneID(o1, i1, decision.instructionIDs[index], index < 255);
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break;
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}
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i1--;
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o1.indent(i1) << "};" << "\n";
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o1 << "\n";
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o2.indent(i2) << "{ /* struct ModRMDecision */" << "\n";
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i2++;
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o2.indent(i2) << stringForDecisionType(dt) << "," << "\n";
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o2.indent(i2) << "modRMTable" << sTableNumber << "\n";
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i2--;
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o2.indent(i2) << "}";
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++sTableNumber;
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}
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void DisassemblerTables::emitOpcodeDecision(
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raw_ostream &o1,
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raw_ostream &o2,
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uint32_t &i1,
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uint32_t &i2,
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OpcodeDecision &decision) const {
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uint16_t index;
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o2.indent(i2) << "{ /* struct OpcodeDecision */" << "\n";
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i2++;
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o2.indent(i2) << "{" << "\n";
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i2++;
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for (index = 0; index < 256; ++index) {
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o2.indent(i2);
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o2 << "/* 0x" << format("%02hhx", index) << " */" << "\n";
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emitModRMDecision(o1, o2, i1, i2, decision.modRMDecisions[index]);
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if (index < 255)
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o2 << ",";
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o2 << "\n";
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}
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i2--;
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o2.indent(i2) << "}" << "\n";
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i2--;
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o2.indent(i2) << "}" << "\n";
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}
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void DisassemblerTables::emitContextDecision(
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raw_ostream &o1,
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raw_ostream &o2,
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uint32_t &i1,
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uint32_t &i2,
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ContextDecision &decision,
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const char* name) const {
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o2.indent(i2) << "static const struct ContextDecision " << name << " = {\n";
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i2++;
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o2.indent(i2) << "{ /* opcodeDecisions */" << "\n";
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i2++;
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unsigned index;
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for (index = 0; index < IC_max; ++index) {
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o2.indent(i2) << "/* ";
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o2 << stringForContext((InstructionContext)index);
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o2 << " */";
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o2 << "\n";
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emitOpcodeDecision(o1, o2, i1, i2, decision.opcodeDecisions[index]);
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if (index + 1 < IC_max)
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o2 << ", ";
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}
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i2--;
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o2.indent(i2) << "}" << "\n";
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i2--;
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o2.indent(i2) << "};" << "\n";
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}
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void DisassemblerTables::emitInstructionInfo(raw_ostream &o, uint32_t &i)
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const {
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o.indent(i * 2) << "static const struct InstructionSpecifier ";
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o << INSTRUCTIONS_STR "[" << InstructionSpecifiers.size() << "] = {\n";
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i++;
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uint16_t numInstructions = InstructionSpecifiers.size();
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uint16_t index, operandIndex;
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for (index = 0; index < numInstructions; ++index) {
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o.indent(i * 2) << "{ /* " << index << " */" << "\n";
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i++;
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o.indent(i * 2) <<
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stringForModifierType(InstructionSpecifiers[index].modifierType);
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o << "," << "\n";
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o.indent(i * 2) << "0x";
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o << format("%02hhx", (uint16_t)InstructionSpecifiers[index].modifierBase);
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o << "," << "\n";
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o.indent(i * 2) << "{" << "\n";
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i++;
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for (operandIndex = 0; operandIndex < X86_MAX_OPERANDS; ++operandIndex) {
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o.indent(i * 2) << "{ ";
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o << stringForOperandEncoding(InstructionSpecifiers[index]
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.operands[operandIndex]
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.encoding);
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o << ", ";
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o << stringForOperandType(InstructionSpecifiers[index]
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.operands[operandIndex]
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.type);
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o << " }";
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if (operandIndex < X86_MAX_OPERANDS - 1)
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o << ",";
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o << "\n";
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}
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i--;
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o.indent(i * 2) << "}," << "\n";
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o.indent(i * 2) << "\"" << InstructionSpecifiers[index].name << "\"";
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o << "\n";
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i--;
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o.indent(i * 2) << "}";
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if (index + 1 < numInstructions)
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o << ",";
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o << "\n";
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}
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i--;
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o.indent(i * 2) << "};" << "\n";
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}
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void DisassemblerTables::emitContextTable(raw_ostream &o, uint32_t &i) const {
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uint16_t index;
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o.indent(i * 2) << "static const InstructionContext " CONTEXTS_STR
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"[256] = {\n";
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i++;
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for (index = 0; index < 256; ++index) {
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o.indent(i * 2);
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if ((index & ATTR_VEXL) && (index & ATTR_OPSIZE))
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o << "IC_VEX_L_OPSIZE";
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else if ((index & ATTR_VEXL) && (index & ATTR_XD))
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o << "IC_VEX_L_XD";
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else if ((index & ATTR_VEXL) && (index & ATTR_XS))
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o << "IC_VEX_L_XS";
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else if ((index & ATTR_VEX) && (index & ATTR_REXW) && (index & ATTR_OPSIZE))
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o << "IC_VEX_W_OPSIZE";
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else if ((index & ATTR_VEX) && (index & ATTR_REXW) && (index & ATTR_XD))
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o << "IC_VEX_W_XD";
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else if ((index & ATTR_VEX) && (index & ATTR_REXW) && (index & ATTR_XS))
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o << "IC_VEX_W_XS";
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else if (index & ATTR_VEXL)
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o << "IC_VEX_L";
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else if ((index & ATTR_VEX) && (index & ATTR_REXW))
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o << "IC_VEX_W";
|
|
else if ((index & ATTR_VEX) && (index & ATTR_OPSIZE))
|
|
o << "IC_VEX_OPSIZE";
|
|
else if ((index & ATTR_VEX) && (index & ATTR_XD))
|
|
o << "IC_VEX_XD";
|
|
else if ((index & ATTR_VEX) && (index & ATTR_XS))
|
|
o << "IC_VEX_XS";
|
|
else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XS))
|
|
o << "IC_64BIT_REXW_XS";
|
|
else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XD))
|
|
o << "IC_64BIT_REXW_XD";
|
|
else if ((index & ATTR_64BIT) && (index & ATTR_REXW) &&
|
|
(index & ATTR_OPSIZE))
|
|
o << "IC_64BIT_REXW_OPSIZE";
|
|
else if ((index & ATTR_64BIT) && (index & ATTR_XS))
|
|
o << "IC_64BIT_XS";
|
|
else if ((index & ATTR_64BIT) && (index & ATTR_XD))
|
|
o << "IC_64BIT_XD";
|
|
else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE))
|
|
o << "IC_64BIT_OPSIZE";
|
|
else if ((index & ATTR_64BIT) && (index & ATTR_REXW))
|
|
o << "IC_64BIT_REXW";
|
|
else if ((index & ATTR_64BIT))
|
|
o << "IC_64BIT";
|
|
else if (index & ATTR_XS)
|
|
o << "IC_XS";
|
|
else if (index & ATTR_XD)
|
|
o << "IC_XD";
|
|
else if (index & ATTR_OPSIZE)
|
|
o << "IC_OPSIZE";
|
|
else if (index & ATTR_VEX)
|
|
o << "IC_VEX";
|
|
else
|
|
o << "IC";
|
|
|
|
if (index < 255)
|
|
o << ",";
|
|
else
|
|
o << " ";
|
|
|
|
o << " /* " << index << " */";
|
|
|
|
o << "\n";
|
|
}
|
|
|
|
i--;
|
|
o.indent(i * 2) << "};" << "\n";
|
|
}
|
|
|
|
void DisassemblerTables::emitContextDecisions(raw_ostream &o1,
|
|
raw_ostream &o2,
|
|
uint32_t &i1,
|
|
uint32_t &i2)
|
|
const {
|
|
emitContextDecision(o1, o2, i1, i2, *Tables[0], ONEBYTE_STR);
|
|
emitContextDecision(o1, o2, i1, i2, *Tables[1], TWOBYTE_STR);
|
|
emitContextDecision(o1, o2, i1, i2, *Tables[2], THREEBYTE38_STR);
|
|
emitContextDecision(o1, o2, i1, i2, *Tables[3], THREEBYTE3A_STR);
|
|
emitContextDecision(o1, o2, i1, i2, *Tables[4], THREEBYTEA6_STR);
|
|
emitContextDecision(o1, o2, i1, i2, *Tables[5], THREEBYTEA7_STR);
|
|
}
|
|
|
|
void DisassemblerTables::emit(raw_ostream &o) const {
|
|
uint32_t i1 = 0;
|
|
uint32_t i2 = 0;
|
|
|
|
std::string s1;
|
|
std::string s2;
|
|
|
|
raw_string_ostream o1(s1);
|
|
raw_string_ostream o2(s2);
|
|
|
|
emitInstructionInfo(o, i2);
|
|
o << "\n";
|
|
|
|
emitContextTable(o, i2);
|
|
o << "\n";
|
|
|
|
emitEmptyTable(o1, i1);
|
|
emitContextDecisions(o1, o2, i1, i2);
|
|
|
|
o << o1.str();
|
|
o << "\n";
|
|
o << o2.str();
|
|
o << "\n";
|
|
o << "\n";
|
|
}
|
|
|
|
void DisassemblerTables::setTableFields(ModRMDecision &decision,
|
|
const ModRMFilter &filter,
|
|
InstrUID uid,
|
|
uint8_t opcode) {
|
|
unsigned index;
|
|
|
|
for (index = 0; index < 256; ++index) {
|
|
if (filter.accepts(index)) {
|
|
if (decision.instructionIDs[index] == uid)
|
|
continue;
|
|
|
|
if (decision.instructionIDs[index] != 0) {
|
|
InstructionSpecifier &newInfo =
|
|
InstructionSpecifiers[uid];
|
|
InstructionSpecifier &previousInfo =
|
|
InstructionSpecifiers[decision.instructionIDs[index]];
|
|
|
|
if(newInfo.filtered)
|
|
continue; // filtered instructions get lowest priority
|
|
|
|
if(previousInfo.name == "NOOP")
|
|
continue; // special case for XCHG32ar and NOOP
|
|
|
|
if (outranks(previousInfo.insnContext, newInfo.insnContext))
|
|
continue;
|
|
|
|
if (previousInfo.insnContext == newInfo.insnContext &&
|
|
!previousInfo.filtered) {
|
|
errs() << "Error: Primary decode conflict: ";
|
|
errs() << newInfo.name << " would overwrite " << previousInfo.name;
|
|
errs() << "\n";
|
|
errs() << "ModRM " << index << "\n";
|
|
errs() << "Opcode " << (uint16_t)opcode << "\n";
|
|
errs() << "Context " << stringForContext(newInfo.insnContext) << "\n";
|
|
HasConflicts = true;
|
|
}
|
|
}
|
|
|
|
decision.instructionIDs[index] = uid;
|
|
}
|
|
}
|
|
}
|
|
|
|
void DisassemblerTables::setTableFields(OpcodeType type,
|
|
InstructionContext insnContext,
|
|
uint8_t opcode,
|
|
const ModRMFilter &filter,
|
|
InstrUID uid) {
|
|
unsigned index;
|
|
|
|
ContextDecision &decision = *Tables[type];
|
|
|
|
for (index = 0; index < IC_max; ++index) {
|
|
if (inheritsFrom((InstructionContext)index,
|
|
InstructionSpecifiers[uid].insnContext))
|
|
setTableFields(decision.opcodeDecisions[index].modRMDecisions[opcode],
|
|
filter,
|
|
uid,
|
|
opcode);
|
|
}
|
|
}
|