f86e60008b
o Remove All Rights Reserved from my notices o imp@FreeBSD.org everywhere o regularize punctiation, eliminate date ranges o Make sure that it's clear that I don't claim All Rights reserved by listing All Rights Reserved on same line as other copyright holders (but not me). Other such holders are also listed last where it's clear.
396 lines
10 KiB
C
396 lines
10 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2006 M. Warner Losh <imp@FreeBSD.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* Generic IIC eeprom support, modeled after the AT24C family of products.
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*/
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#include "opt_platform.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/resource.h>
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#include <sys/sx.h>
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#include <sys/sysctl.h>
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#include <sys/uio.h>
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#include <machine/bus.h>
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#ifdef FDT
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#endif
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#include <dev/iicbus/iiconf.h>
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#include <dev/iicbus/iicbus.h>
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#include "iicbus_if.h"
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/*
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* AT24 parts have a "write page size" that differs per-device, and a "read page
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* size" that is always equal to the full device size. We define maximum values
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* here to limit how long we occupy the bus with a single transfer, and because
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* there are temporary buffers of these sizes allocated on the stack.
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*/
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#define MAX_RD_SZ 256 /* Largest read size we support */
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#define MAX_WR_SZ 256 /* Largest write size we support */
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struct icee_softc {
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device_t dev; /* Myself */
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struct cdev *cdev; /* user interface */
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int addr; /* Slave address on the bus */
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int size; /* How big am I? */
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int type; /* What address type 8 or 16 bit? */
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int wr_sz; /* What's the write page size */
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};
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#ifdef FDT
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struct eeprom_desc {
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int type;
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int size;
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int wr_sz;
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const char *name;
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};
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static struct eeprom_desc type_desc[] = {
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{ 8, 128, 8, "AT24C01"},
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{ 8, 256, 8, "AT24C02"},
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{ 8, 512, 16, "AT24C04"},
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{ 8, 1024, 16, "AT24C08"},
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{ 8, 2 * 1024, 16, "AT24C16"},
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{16, 4 * 1024, 32, "AT24C32"},
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{16, 8 * 1024, 32, "AT24C64"},
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{16, 16 * 1024, 64, "AT24C128"},
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{16, 32 * 1024, 64, "AT24C256"},
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{16, 64 * 1024, 128, "AT24C512"},
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{16, 128 * 1024, 256, "AT24CM01"},
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};
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static struct ofw_compat_data compat_data[] = {
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{"atmel,24c01", (uintptr_t)(&type_desc[0])},
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{"atmel,24c02", (uintptr_t)(&type_desc[1])},
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{"atmel,24c04", (uintptr_t)(&type_desc[2])},
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{"atmel,24c08", (uintptr_t)(&type_desc[3])},
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{"atmel,24c16", (uintptr_t)(&type_desc[4])},
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{"atmel,24c32", (uintptr_t)(&type_desc[5])},
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{"atmel,24c64", (uintptr_t)(&type_desc[6])},
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{"atmel,24c128", (uintptr_t)(&type_desc[7])},
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{"atmel,24c256", (uintptr_t)(&type_desc[8])},
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{"atmel,24c512", (uintptr_t)(&type_desc[9])},
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{"atmel,24c1024", (uintptr_t)(&type_desc[10])},
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{NULL, (uintptr_t)NULL},
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};
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#endif
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#define CDEV2SOFTC(dev) ((dev)->si_drv1)
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/* cdev routines */
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static d_open_t icee_open;
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static d_close_t icee_close;
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static d_read_t icee_read;
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static d_write_t icee_write;
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static struct cdevsw icee_cdevsw =
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{
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.d_version = D_VERSION,
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.d_flags = D_TRACKCLOSE,
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.d_open = icee_open,
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.d_close = icee_close,
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.d_read = icee_read,
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.d_write = icee_write
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};
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#ifdef FDT
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static int
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icee_probe(device_t dev)
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{
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struct eeprom_desc *d;
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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d = (struct eeprom_desc *)
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ofw_bus_search_compatible(dev, compat_data)->ocd_data;
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if (d == NULL)
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return (ENXIO);
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device_set_desc(dev, d->name);
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return (BUS_PROBE_DEFAULT);
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}
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static void
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icee_init(struct icee_softc *sc)
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{
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struct eeprom_desc *d;
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d = (struct eeprom_desc *)
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ofw_bus_search_compatible(sc->dev, compat_data)->ocd_data;
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if (d == NULL)
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return; /* attach will see sc->size == 0 and return error */
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sc->size = d->size;
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sc->type = d->type;
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sc->wr_sz = d->wr_sz;
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}
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#else /* !FDT */
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static int
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icee_probe(device_t dev)
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{
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device_set_desc(dev, "I2C EEPROM");
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return (BUS_PROBE_NOWILDCARD);
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}
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static void
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icee_init(struct icee_softc *sc)
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{
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const char *dname;
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int dunit;
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dname = device_get_name(sc->dev);
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dunit = device_get_unit(sc->dev);
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resource_int_value(dname, dunit, "size", &sc->size);
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resource_int_value(dname, dunit, "type", &sc->type);
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resource_int_value(dname, dunit, "wr_sz", &sc->wr_sz);
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}
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#endif /* FDT */
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static int
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icee_attach(device_t dev)
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{
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struct icee_softc *sc = device_get_softc(dev);
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struct sysctl_ctx_list *ctx;
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struct sysctl_oid_list *tree;
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sc->dev = dev;
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sc->addr = iicbus_get_addr(dev);
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icee_init(sc);
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if (sc->size == 0 || sc->type == 0 || sc->wr_sz == 0) {
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device_printf(sc->dev, "Missing config data, "
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"these cannot be zero: size %d type %d wr_sz %d\n",
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sc->size, sc->type, sc->wr_sz);
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return (EINVAL);
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}
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if (bootverbose)
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device_printf(dev, "size: %d bytes, addressing: %d-bits\n",
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sc->size, sc->type);
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sc->cdev = make_dev(&icee_cdevsw, device_get_unit(dev), UID_ROOT,
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GID_WHEEL, 0600, "icee%d", device_get_unit(dev));
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if (sc->cdev == NULL) {
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return (ENOMEM);
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}
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sc->cdev->si_drv1 = sc;
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ctx = device_get_sysctl_ctx(dev);
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tree = SYSCTL_CHILDREN(device_get_sysctl_tree(dev));
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SYSCTL_ADD_INT(ctx, tree, OID_AUTO, "address_size", CTLFLAG_RD,
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&sc->type, 0, "Memory array address size in bits");
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SYSCTL_ADD_INT(ctx, tree, OID_AUTO, "device_size", CTLFLAG_RD,
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&sc->size, 0, "Memory array capacity in bytes");
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SYSCTL_ADD_INT(ctx, tree, OID_AUTO, "write_size", CTLFLAG_RD,
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&sc->wr_sz, 0, "Memory array page write size in bytes");
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return (0);
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}
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static int
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icee_detach(device_t dev)
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{
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struct icee_softc *sc = device_get_softc(dev);
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destroy_dev(sc->cdev);
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return (0);
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}
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static int
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icee_open(struct cdev *dev, int oflags, int devtype, struct thread *td)
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{
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struct icee_softc *sc;
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sc = CDEV2SOFTC(dev);
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if (device_get_state(sc->dev) < DS_BUSY)
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device_busy(sc->dev);
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return (0);
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}
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static int
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icee_close(struct cdev *dev, int fflag, int devtype, struct thread *td)
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{
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struct icee_softc *sc;
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sc = CDEV2SOFTC(dev);
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device_unbusy(sc->dev);
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return (0);
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}
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static int
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icee_read(struct cdev *dev, struct uio *uio, int ioflag)
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{
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struct icee_softc *sc;
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uint8_t addr[2];
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uint8_t data[MAX_RD_SZ];
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int error, i, len, slave;
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struct iic_msg msgs[2] = {
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{ 0, IIC_M_WR, 1, addr },
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{ 0, IIC_M_RD, 0, data },
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};
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sc = CDEV2SOFTC(dev);
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if (uio->uio_offset == sc->size)
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return (0);
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if (uio->uio_offset > sc->size)
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return (EIO);
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if (sc->type != 8 && sc->type != 16)
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return (EINVAL);
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slave = error = 0;
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while (uio->uio_resid > 0) {
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if (uio->uio_offset >= sc->size)
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break;
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len = MIN(MAX_RD_SZ - (uio->uio_offset & (MAX_RD_SZ - 1)),
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uio->uio_resid);
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switch (sc->type) {
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case 8:
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slave = (uio->uio_offset >> 7) | sc->addr;
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msgs[0].len = 1;
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msgs[1].len = len;
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addr[0] = uio->uio_offset & 0xff;
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break;
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case 16:
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slave = sc->addr | (uio->uio_offset >> 15);
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msgs[0].len = 2;
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msgs[1].len = len;
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addr[0] = (uio->uio_offset >> 8) & 0xff;
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addr[1] = uio->uio_offset & 0xff;
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break;
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}
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for (i = 0; i < 2; i++)
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msgs[i].slave = slave;
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error = iicbus_transfer_excl(sc->dev, msgs, 2, IIC_INTRWAIT);
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if (error) {
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error = iic2errno(error);
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break;
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}
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error = uiomove(data, len, uio);
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if (error)
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break;
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}
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return (error);
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}
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/*
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* Write to the part. We use three transfers here since we're actually
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* doing a write followed by a read to make sure that the write finished.
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* It is easier to encode the dummy read here than to break things up
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* into smaller chunks...
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*/
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static int
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icee_write(struct cdev *dev, struct uio *uio, int ioflag)
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{
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struct icee_softc *sc;
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int error, len, slave, waitlimit;
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uint8_t data[MAX_WR_SZ + 2];
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struct iic_msg wr[1] = {
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{ 0, IIC_M_WR, 0, data },
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};
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struct iic_msg rd[1] = {
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{ 0, IIC_M_RD, 1, data },
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};
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sc = CDEV2SOFTC(dev);
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if (uio->uio_offset >= sc->size)
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return (EIO);
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if (sc->type != 8 && sc->type != 16)
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return (EINVAL);
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slave = error = 0;
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while (uio->uio_resid > 0) {
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if (uio->uio_offset >= sc->size)
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break;
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len = MIN(sc->wr_sz - (uio->uio_offset & (sc->wr_sz - 1)),
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uio->uio_resid);
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switch (sc->type) {
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case 8:
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slave = (uio->uio_offset >> 7) | sc->addr;
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wr[0].len = 1 + len;
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data[0] = uio->uio_offset & 0xff;
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break;
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case 16:
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slave = sc->addr | (uio->uio_offset >> 15);
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wr[0].len = 2 + len;
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data[0] = (uio->uio_offset >> 8) & 0xff;
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data[1] = uio->uio_offset & 0xff;
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break;
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}
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wr[0].slave = slave;
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error = uiomove(data + sc->type / 8, len, uio);
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if (error)
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break;
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error = iicbus_transfer_excl(sc->dev, wr, 1, IIC_INTRWAIT);
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if (error) {
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error = iic2errno(error);
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break;
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}
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/* Read after write to wait for write-done. */
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waitlimit = 10000;
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rd[0].slave = slave;
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do {
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error = iicbus_transfer_excl(sc->dev, rd, 1,
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IIC_INTRWAIT);
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} while (waitlimit-- > 0 && error != 0);
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if (error) {
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error = iic2errno(error);
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break;
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}
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}
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return error;
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}
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static device_method_t icee_methods[] = {
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DEVMETHOD(device_probe, icee_probe),
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DEVMETHOD(device_attach, icee_attach),
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DEVMETHOD(device_detach, icee_detach),
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DEVMETHOD_END
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};
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static driver_t icee_driver = {
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"icee",
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icee_methods,
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sizeof(struct icee_softc),
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};
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static devclass_t icee_devclass;
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DRIVER_MODULE(icee, iicbus, icee_driver, icee_devclass, 0, 0);
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MODULE_VERSION(icee, 1);
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MODULE_DEPEND(icee, iicbus, 1, 1, 1);
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IICBUS_FDT_PNP_INFO(compat_data);
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