d212022417
o recognize ixp435 cpu o change memory layout for for ixp4xx to not assume memory is aliases to 0x10000000 (Cambria/ixp435 memory starts at zero) o handle 64 irqs for ixp435 o dual EHCI USB 2.0 controller integral to ixp435 o overhaul NPE code for ixp435 and better MAC+MII naming o updated NPE firmware (including NPE-A image for ixp435/ixp465) o Gateworks Cambria board support: - IDE compact flash - MCU - front panel LED on i2c bus - Octal LED latch Sanity-tested with NFS-root on Avila and Cambria boards. Requires pending boot2 mods for CF-boot on Cambria.
103 lines
3.5 KiB
C
103 lines
3.5 KiB
C
/* $NetBSD: ixp425_mem.c,v 1.2 2005/12/11 12:16:51 christos Exp $ */
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/*
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* Copyright (c) 2003 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Steve C. Woodford for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <arm/xscale/ixp425/ixp425reg.h>
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#include <arm/xscale/ixp425/ixp425var.h>
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static uint32_t sdram_64bit[] = {
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0x00800000, /* 8M: One 2M x 32 chip */
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0x01000000, /* 16M: Two 2M x 32 chips */
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0x01000000, /* 16M: Two 4M x 16 chips */
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0x02000000, /* 32M: Four 4M x 32 chips */
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0, 0, 0, 0
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};
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static uint32_t sdram_other[] = {
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0x02000000, /* 32M: Two 8M x 16 chips */
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0x04000000, /* 64M: Four 8M x 16 chips */
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0x04000000, /* 64M: Two 16M x 16 chips */
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0x08000000, /* 128M: Four 16M x 16 chips */
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0x08000000, /* 128M: Two 32M x 16 chips */
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0x10000000, /* 256M: Four 32M x 16 chips */
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0, 0
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};
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uint32_t
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ixp425_sdram_size(void)
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{
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#define MCU_REG_READ(x) (*(volatile uint32_t *)(IXP425_MCU_VBASE + (x)))
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uint32_t size, sdr_config;
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sdr_config = MCU_REG_READ(MCU_SDR_CONFIG);
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if (sdr_config & MCU_SDR_CONFIG_64MBIT)
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size = sdram_64bit[MCU_SDR_CONFIG_MCONF(sdr_config)];
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else
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size = sdram_other[MCU_SDR_CONFIG_MCONF(sdr_config)];
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if (size == 0) {
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printf("** SDR_CONFIG retuns unknown value, using 32M\n");
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size = 32 * 1024 * 1024;
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}
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return (size);
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#undef MCU_REG_READ
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}
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uint32_t
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ixp435_ddram_size(void)
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{
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#define MCU_REG_READ(x) (*(volatile uint32_t *)(IXP425_MCU_VBASE + (x)))
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uint32_t sbr0;
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/*
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* Table 198, page 516 shows DDR-I/II SDRAM bank sizes
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* for SBR0 and SBR1. The manual states both banks must
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* be programmed to be the same size. We just assume
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* it's done right and calculate 2x for the memory size.
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*/
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sbr0 = MCU_REG_READ(MCU_DDR_SBR0);
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return 2 * 16*(sbr0 & 0x7f) * 1024 * 1024;
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#undef MCU_REG_READ
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}
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