3cbf3585cb
the virtio backends. - Add a new ioctl to export the count of pins on the I/O APIC from vmm to the hypervisor. - Use pins on the I/O APIC >= 16 for PCI interrupts leaving 0-15 for ISA interrupts. - Populate the MP Table with I/O interrupt entries for any PCI INTx interrupts. - Create a _PRT table under the PCI root bridge in ACPI to route any PCI INTx interrupts appropriately. - Track which INTx interrupts are in use per-slot so that functions that share a slot attempt to distribute their INTx interrupts across the four available pins. - Implicitly mask INTx interrupts if either MSI or MSI-X is enabled and when the INTx DIS bit is set in a function's PCI command register. Either assert or deassert the associated I/O APIC pin when the state of one of those conditions changes. - Add INTx support to the virtio backends. - Always advertise the MSI capability in the virtio backends. Submitted by: neel (7) Reviewed by: neel MFC after: 2 weeks
51 lines
685 B
Makefile
51 lines
685 B
Makefile
#
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# $FreeBSD$
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#
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PROG= bhyve
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DEBUG_FLAGS= -g -O0
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MAN= bhyve.8
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SRCS= \
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acpi.c \
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atpic.c \
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bhyverun.c \
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block_if.c \
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consport.c \
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dbgport.c \
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elcr.c \
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inout.c \
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ioapic.c \
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mem.c \
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mevent.c \
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mptbl.c \
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pci_ahci.c \
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pci_emul.c \
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pci_hostbridge.c \
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pci_lpc.c \
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pci_passthru.c \
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pci_virtio_block.c \
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pci_virtio_net.c \
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pci_uart.c \
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pit_8254.c \
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pm.c \
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pmtmr.c \
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post.c \
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rtc.c \
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uart_emul.c \
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virtio.c \
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xmsr.c \
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spinup_ap.c
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.PATH: ${.CURDIR}/../../sys/amd64/vmm
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SRCS+= vmm_instruction_emul.c
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DPADD= ${LIBVMMAPI} ${LIBMD} ${LIBUTIL} ${LIBPTHREAD}
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LDADD= -lvmmapi -lmd -lutil -lpthread
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WARNS?= 2
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.include <bsd.prog.mk>
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