On some architectures, u_long isn't large enough for resource definitions. Particularly, powerpc and arm allow 36-bit (or larger) physical addresses, but type `long' is only 32-bit. This extends rman's resources to uintmax_t. With this change, any resource can feasibly be placed anywhere in physical memory (within the constraints of the driver). Why uintmax_t and not something machine dependent, or uint64_t? Though it's possible for uintmax_t to grow, it's highly unlikely it will become 128-bit on 32-bit architectures. 64-bit architectures should have plenty of RAM to absorb the increase on resource sizes if and when this occurs, and the number of resources on memory-constrained systems should be sufficiently small as to not pose a drastic overhead. That being said, uintmax_t was chosen for source clarity. If it's specified as uint64_t, all printf()-like calls would either need casts to uintmax_t, or be littered with PRI*64 macros. Casts to uintmax_t aren't horrible, but it would also bake into the API for resource_list_print_type() either a hidden assumption that entries get cast to uintmax_t for printing, or these calls would need the PRI*64 macros. Since source code is meant to be read more often than written, I chose the clearest path of simply using uintmax_t. Tested on a PowerPC p5020-based board, which places all device resources in 0xfxxxxxxxx, and has 8GB RAM. Regression tested on qemu-system-i386 Regression tested on qemu-system-mips (malta profile) Tested PAE and devinfo on virtualbox (live CD) Special thanks to bz for his testing on ARM. Reviewed By: bz, jhb (previous) Relnotes: Yes Sponsored by: Alex Perez/Inertial Computing Differential Revision: https://reviews.freebsd.org/D4544
849 lines
20 KiB
C
849 lines
20 KiB
C
/*-
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* Copyright (c) 2006-2008, Juniper Networks, Inc.
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* Copyright (c) 2008 Semihalf, Rafal Czubak
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* Copyright (c) 2009 The FreeBSD Foundation
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* All rights reserved.
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*
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* Portions of this software were developed by Semihalf
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* under sponsorship from the FreeBSD Foundation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include "opt_platform.h"
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/ktr.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <machine/bus.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <powerpc/mpc85xx/mpc85xx.h>
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#include "ofw_bus_if.h"
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#include "lbc.h"
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#ifdef DEBUG
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#define debugf(fmt, args...) do { printf("%s(): ", __func__); \
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printf(fmt,##args); } while (0)
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#else
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#define debugf(fmt, args...)
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#endif
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static MALLOC_DEFINE(M_LBC, "localbus", "localbus devices information");
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static int lbc_probe(device_t);
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static int lbc_attach(device_t);
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static int lbc_shutdown(device_t);
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static int lbc_activate_resource(device_t bus __unused, device_t child __unused,
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int type, int rid __unused, struct resource *r);
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static int lbc_deactivate_resource(device_t bus __unused,
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device_t child __unused, int type __unused, int rid __unused,
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struct resource *r);
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static struct resource *lbc_alloc_resource(device_t, device_t, int, int *,
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rman_res_t, rman_res_t, rman_res_t, u_int);
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static int lbc_print_child(device_t, device_t);
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static int lbc_release_resource(device_t, device_t, int, int,
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struct resource *);
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static const struct ofw_bus_devinfo *lbc_get_devinfo(device_t, device_t);
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/*
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* Bus interface definition
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*/
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static device_method_t lbc_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, lbc_probe),
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DEVMETHOD(device_attach, lbc_attach),
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DEVMETHOD(device_shutdown, lbc_shutdown),
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/* Bus interface */
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DEVMETHOD(bus_print_child, lbc_print_child),
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DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
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DEVMETHOD(bus_teardown_intr, NULL),
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DEVMETHOD(bus_alloc_resource, lbc_alloc_resource),
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DEVMETHOD(bus_release_resource, lbc_release_resource),
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DEVMETHOD(bus_activate_resource, lbc_activate_resource),
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DEVMETHOD(bus_deactivate_resource, lbc_deactivate_resource),
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/* OFW bus interface */
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DEVMETHOD(ofw_bus_get_devinfo, lbc_get_devinfo),
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DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
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DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
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DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
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DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
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DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
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{ 0, 0 }
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};
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static driver_t lbc_driver = {
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"lbc",
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lbc_methods,
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sizeof(struct lbc_softc)
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};
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devclass_t lbc_devclass;
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EARLY_DRIVER_MODULE(lbc, ofwbus, lbc_driver, lbc_devclass,
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0, 0, BUS_PASS_BUS);
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/*
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* Calculate address mask used by OR(n) registers. Use memory region size to
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* determine mask value. The size must be a power of two and within the range
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* of 32KB - 4GB. Otherwise error code is returned. Value representing
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* 4GB size can be passed as 0xffffffff.
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*/
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static uint32_t
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lbc_address_mask(uint32_t size)
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{
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int n = 15;
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if (size == ~0)
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return (0);
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while (n < 32) {
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if (size == (1U << n))
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break;
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n++;
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}
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if (n == 32)
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return (EINVAL);
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return (0xffff8000 << (n - 15));
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}
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static void
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lbc_banks_unmap(struct lbc_softc *sc)
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{
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int r;
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r = 0;
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while (r < LBC_DEV_MAX) {
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if (sc->sc_range[r].size == 0)
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return;
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pmap_unmapdev(sc->sc_range[r].kva, sc->sc_range[r].size);
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law_disable(OCP85XX_TGTIF_LBC, sc->sc_range[r].addr,
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sc->sc_range[r].size);
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r++;
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}
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}
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static int
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lbc_banks_map(struct lbc_softc *sc)
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{
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vm_paddr_t end, start;
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vm_size_t size;
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u_int i, r, ranges, s;
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int error;
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bzero(sc->sc_range, sizeof(sc->sc_range));
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/*
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* Determine number of discontiguous address ranges to program.
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*/
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ranges = 0;
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for (i = 0; i < LBC_DEV_MAX; i++) {
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size = sc->sc_banks[i].size;
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if (size == 0)
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continue;
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start = sc->sc_banks[i].addr;
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for (r = 0; r < ranges; r++) {
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/* Avoid wrap-around bugs. */
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end = sc->sc_range[r].addr - 1 + sc->sc_range[r].size;
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if (start > 0 && end == start - 1) {
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sc->sc_range[r].size += size;
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break;
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}
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/* Avoid wrap-around bugs. */
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end = start - 1 + size;
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if (sc->sc_range[r].addr > 0 &&
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end == sc->sc_range[r].addr - 1) {
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sc->sc_range[r].addr = start;
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sc->sc_range[r].size += size;
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break;
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}
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}
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if (r == ranges) {
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/* New range; add using insertion sort */
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r = 0;
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while (r < ranges && sc->sc_range[r].addr < start)
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r++;
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for (s = ranges; s > r; s--)
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sc->sc_range[s] = sc->sc_range[s-1];
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sc->sc_range[r].addr = start;
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sc->sc_range[r].size = size;
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ranges++;
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}
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}
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/*
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* Ranges are sorted so quickly go over the list to merge ranges
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* that grew toward each other while building the ranges.
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*/
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r = 0;
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while (r < ranges - 1) {
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end = sc->sc_range[r].addr + sc->sc_range[r].size;
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if (end != sc->sc_range[r+1].addr) {
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r++;
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continue;
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}
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sc->sc_range[r].size += sc->sc_range[r+1].size;
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for (s = r + 1; s < ranges - 1; s++)
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sc->sc_range[s] = sc->sc_range[s+1];
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bzero(&sc->sc_range[s], sizeof(sc->sc_range[s]));
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ranges--;
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}
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/*
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* Configure LAW for the LBC ranges and map the physical memory
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* range into KVA.
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*/
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for (r = 0; r < ranges; r++) {
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start = sc->sc_range[r].addr;
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size = sc->sc_range[r].size;
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error = law_enable(OCP85XX_TGTIF_LBC, start, size);
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if (error)
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return (error);
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sc->sc_range[r].kva = (vm_offset_t)pmap_mapdev(start, size);
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}
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/* XXX: need something better here? */
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if (ranges == 0)
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return (EINVAL);
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/* Assign KVA to banks based on the enclosing range. */
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for (i = 0; i < LBC_DEV_MAX; i++) {
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size = sc->sc_banks[i].size;
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if (size == 0)
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continue;
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start = sc->sc_banks[i].addr;
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for (r = 0; r < ranges; r++) {
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end = sc->sc_range[r].addr - 1 + sc->sc_range[r].size;
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if (start >= sc->sc_range[r].addr &&
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start - 1 + size <= end)
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break;
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}
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if (r < ranges) {
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sc->sc_banks[i].kva = sc->sc_range[r].kva +
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(start - sc->sc_range[r].addr);
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}
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}
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return (0);
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}
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static int
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lbc_banks_enable(struct lbc_softc *sc)
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{
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uint32_t size;
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uint32_t regval;
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int error, i;
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for (i = 0; i < LBC_DEV_MAX; i++) {
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size = sc->sc_banks[i].size;
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if (size == 0)
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continue;
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/*
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* Compute and program BR value.
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*/
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regval = sc->sc_banks[i].addr;
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switch (sc->sc_banks[i].width) {
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case 8:
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regval |= (1 << 11);
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break;
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case 16:
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regval |= (2 << 11);
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break;
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case 32:
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regval |= (3 << 11);
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break;
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default:
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error = EINVAL;
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goto fail;
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}
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regval |= (sc->sc_banks[i].decc << 9);
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regval |= (sc->sc_banks[i].wp << 8);
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regval |= (sc->sc_banks[i].msel << 5);
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regval |= (sc->sc_banks[i].atom << 2);
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regval |= 1;
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bus_space_write_4(sc->sc_bst, sc->sc_bsh,
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LBC85XX_BR(i), regval);
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|
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/*
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|
* Compute and program OR value.
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*/
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regval = lbc_address_mask(size);
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switch (sc->sc_banks[i].msel) {
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case LBCRES_MSEL_GPCM:
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/* TODO Add flag support for option registers */
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regval |= 0x0ff7;
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break;
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case LBCRES_MSEL_FCM:
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/* TODO Add flag support for options register */
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regval |= 0x0796;
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break;
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case LBCRES_MSEL_UPMA:
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case LBCRES_MSEL_UPMB:
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case LBCRES_MSEL_UPMC:
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printf("UPM mode not supported yet!");
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error = ENOSYS;
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goto fail;
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|
}
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bus_space_write_4(sc->sc_bst, sc->sc_bsh,
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LBC85XX_OR(i), regval);
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}
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|
|
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return (0);
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|
|
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fail:
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lbc_banks_unmap(sc);
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return (error);
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}
|
|
|
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static void
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fdt_lbc_fixup(phandle_t node, struct lbc_softc *sc, struct lbc_devinfo *di)
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{
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pcell_t width;
|
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int bank;
|
|
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if (OF_getprop(node, "bank-width", (void *)&width, sizeof(width)) <= 0)
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return;
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|
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bank = di->di_bank;
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if (sc->sc_banks[bank].size == 0)
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return;
|
|
|
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/* Express width in bits. */
|
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sc->sc_banks[bank].width = width * 8;
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}
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|
|
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static int
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fdt_lbc_reg_decode(phandle_t node, struct lbc_softc *sc,
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struct lbc_devinfo *di)
|
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{
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u_long start, end, count;
|
|
pcell_t *reg, *regptr;
|
|
pcell_t addr_cells, size_cells;
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int tuple_size, tuples;
|
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int i, rv, bank;
|
|
|
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if (fdt_addrsize_cells(OF_parent(node), &addr_cells, &size_cells) != 0)
|
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return (ENXIO);
|
|
|
|
tuple_size = sizeof(pcell_t) * (addr_cells + size_cells);
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tuples = OF_getprop_alloc(node, "reg", tuple_size, (void **)®);
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debugf("addr_cells = %d, size_cells = %d\n", addr_cells, size_cells);
|
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debugf("tuples = %d, tuple size = %d\n", tuples, tuple_size);
|
|
if (tuples <= 0)
|
|
/* No 'reg' property in this node. */
|
|
return (0);
|
|
|
|
regptr = reg;
|
|
for (i = 0; i < tuples; i++) {
|
|
|
|
bank = fdt_data_get((void *)reg, 1);
|
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di->di_bank = bank;
|
|
reg += 1;
|
|
|
|
/* Get address/size. */
|
|
rv = fdt_data_to_res(reg, addr_cells - 1, size_cells, &start,
|
|
&count);
|
|
if (rv != 0) {
|
|
resource_list_free(&di->di_res);
|
|
goto out;
|
|
}
|
|
reg += addr_cells - 1 + size_cells;
|
|
|
|
/* Calculate address range relative to VA base. */
|
|
start = sc->sc_banks[bank].kva + start;
|
|
end = start + count - 1;
|
|
|
|
debugf("reg addr bank = %d, start = %lx, end = %lx, "
|
|
"count = %lx\n", bank, start, end, count);
|
|
|
|
/* Use bank (CS) cell as rid. */
|
|
resource_list_add(&di->di_res, SYS_RES_MEMORY, bank, start,
|
|
end, count);
|
|
}
|
|
rv = 0;
|
|
out:
|
|
free(regptr, M_OFWPROP);
|
|
return (rv);
|
|
}
|
|
|
|
static void
|
|
lbc_intr(void *arg)
|
|
{
|
|
struct lbc_softc *sc = arg;
|
|
uint32_t ltesr;
|
|
|
|
ltesr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTESR);
|
|
sc->sc_ltesr = ltesr;
|
|
bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTESR, ltesr);
|
|
wakeup(sc->sc_dev);
|
|
}
|
|
|
|
static int
|
|
lbc_probe(device_t dev)
|
|
{
|
|
|
|
if (!(ofw_bus_is_compatible(dev, "fsl,lbc") ||
|
|
ofw_bus_is_compatible(dev, "fsl,elbc")))
|
|
return (ENXIO);
|
|
|
|
device_set_desc(dev, "Freescale Local Bus Controller");
|
|
return (BUS_PROBE_DEFAULT);
|
|
}
|
|
|
|
static int
|
|
lbc_attach(device_t dev)
|
|
{
|
|
struct lbc_softc *sc;
|
|
struct lbc_devinfo *di;
|
|
struct rman *rm;
|
|
u_long offset, start, size;
|
|
device_t cdev;
|
|
phandle_t node, child;
|
|
pcell_t *ranges, *rangesptr;
|
|
int tuple_size, tuples;
|
|
int par_addr_cells;
|
|
int bank, error, i;
|
|
|
|
sc = device_get_softc(dev);
|
|
sc->sc_dev = dev;
|
|
|
|
sc->sc_mrid = 0;
|
|
sc->sc_mres = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_mrid,
|
|
RF_ACTIVE);
|
|
if (sc->sc_mres == NULL)
|
|
return (ENXIO);
|
|
|
|
sc->sc_bst = rman_get_bustag(sc->sc_mres);
|
|
sc->sc_bsh = rman_get_bushandle(sc->sc_mres);
|
|
|
|
for (bank = 0; bank < LBC_DEV_MAX; bank++) {
|
|
bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_BR(bank), 0);
|
|
bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_OR(bank), 0);
|
|
}
|
|
|
|
/*
|
|
* Initialize configuration register:
|
|
* - enable Local Bus
|
|
* - set data buffer control signal function
|
|
* - disable parity byte select
|
|
* - set ECC parity type
|
|
* - set bus monitor timing and timer prescale
|
|
*/
|
|
bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LBCR, 0);
|
|
|
|
/*
|
|
* Initialize clock ratio register:
|
|
* - disable PLL bypass mode
|
|
* - configure LCLK delay cycles for the assertion of LALE
|
|
* - set system clock divider
|
|
*/
|
|
bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LCRR, 0x00030008);
|
|
|
|
bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTEDR, 0);
|
|
bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTESR, ~0);
|
|
bus_space_write_4(sc->sc_bst, sc->sc_bsh, LBC85XX_LTEIR, 0x64080001);
|
|
|
|
sc->sc_irid = 0;
|
|
sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->sc_irid,
|
|
RF_ACTIVE | RF_SHAREABLE);
|
|
if (sc->sc_ires != NULL) {
|
|
error = bus_setup_intr(dev, sc->sc_ires,
|
|
INTR_TYPE_MISC | INTR_MPSAFE, NULL, lbc_intr, sc,
|
|
&sc->sc_icookie);
|
|
if (error) {
|
|
device_printf(dev, "could not activate interrupt\n");
|
|
bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
|
|
sc->sc_ires);
|
|
sc->sc_ires = NULL;
|
|
}
|
|
}
|
|
|
|
sc->sc_ltesr = ~0;
|
|
|
|
rangesptr = NULL;
|
|
|
|
rm = &sc->sc_rman;
|
|
rm->rm_type = RMAN_ARRAY;
|
|
rm->rm_descr = "Local Bus Space";
|
|
error = rman_init(rm);
|
|
if (error)
|
|
goto fail;
|
|
|
|
error = rman_manage_region(rm, rm->rm_start, rm->rm_end);
|
|
if (error) {
|
|
rman_fini(rm);
|
|
goto fail;
|
|
}
|
|
|
|
/*
|
|
* Process 'ranges' property.
|
|
*/
|
|
node = ofw_bus_get_node(dev);
|
|
if ((fdt_addrsize_cells(node, &sc->sc_addr_cells,
|
|
&sc->sc_size_cells)) != 0) {
|
|
error = ENXIO;
|
|
goto fail;
|
|
}
|
|
|
|
par_addr_cells = fdt_parent_addr_cells(node);
|
|
if (par_addr_cells > 2) {
|
|
device_printf(dev, "unsupported parent #addr-cells\n");
|
|
error = ERANGE;
|
|
goto fail;
|
|
}
|
|
tuple_size = sizeof(pcell_t) * (sc->sc_addr_cells + par_addr_cells +
|
|
sc->sc_size_cells);
|
|
|
|
tuples = OF_getprop_alloc(node, "ranges", tuple_size,
|
|
(void **)&ranges);
|
|
if (tuples < 0) {
|
|
device_printf(dev, "could not retrieve 'ranges' property\n");
|
|
error = ENXIO;
|
|
goto fail;
|
|
}
|
|
rangesptr = ranges;
|
|
|
|
debugf("par addr_cells = %d, addr_cells = %d, size_cells = %d, "
|
|
"tuple_size = %d, tuples = %d\n", par_addr_cells,
|
|
sc->sc_addr_cells, sc->sc_size_cells, tuple_size, tuples);
|
|
|
|
start = 0;
|
|
size = 0;
|
|
for (i = 0; i < tuples; i++) {
|
|
|
|
/* The first cell is the bank (chip select) number. */
|
|
bank = fdt_data_get((void *)ranges, 1);
|
|
if (bank < 0 || bank > LBC_DEV_MAX) {
|
|
device_printf(dev, "bank out of range: %d\n", bank);
|
|
error = ERANGE;
|
|
goto fail;
|
|
}
|
|
ranges += 1;
|
|
|
|
/*
|
|
* Remaining cells of the child address define offset into
|
|
* this CS.
|
|
*/
|
|
offset = fdt_data_get((void *)ranges, sc->sc_addr_cells - 1);
|
|
ranges += sc->sc_addr_cells - 1;
|
|
|
|
/* Parent bus start address of this bank. */
|
|
start = fdt_data_get((void *)ranges, par_addr_cells);
|
|
ranges += par_addr_cells;
|
|
|
|
size = fdt_data_get((void *)ranges, sc->sc_size_cells);
|
|
ranges += sc->sc_size_cells;
|
|
debugf("bank = %d, start = %lx, size = %lx\n", bank,
|
|
start, size);
|
|
|
|
sc->sc_banks[bank].addr = start + offset;
|
|
sc->sc_banks[bank].size = size;
|
|
|
|
/*
|
|
* Attributes for the bank.
|
|
*
|
|
* XXX Note there are no DT bindings defined for them at the
|
|
* moment, so we need to provide some defaults.
|
|
*/
|
|
sc->sc_banks[bank].width = 16;
|
|
sc->sc_banks[bank].msel = LBCRES_MSEL_GPCM;
|
|
sc->sc_banks[bank].decc = LBCRES_DECC_DISABLED;
|
|
sc->sc_banks[bank].atom = LBCRES_ATOM_DISABLED;
|
|
sc->sc_banks[bank].wp = 0;
|
|
}
|
|
|
|
/*
|
|
* Initialize mem-mappings for the LBC banks (i.e. chip selects).
|
|
*/
|
|
error = lbc_banks_map(sc);
|
|
if (error)
|
|
goto fail;
|
|
|
|
/*
|
|
* Walk the localbus and add direct subordinates as our children.
|
|
*/
|
|
for (child = OF_child(node); child != 0; child = OF_peer(child)) {
|
|
|
|
di = malloc(sizeof(*di), M_LBC, M_WAITOK | M_ZERO);
|
|
|
|
if (ofw_bus_gen_setup_devinfo(&di->di_ofw, child) != 0) {
|
|
free(di, M_LBC);
|
|
device_printf(dev, "could not set up devinfo\n");
|
|
continue;
|
|
}
|
|
|
|
resource_list_init(&di->di_res);
|
|
|
|
if (fdt_lbc_reg_decode(child, sc, di)) {
|
|
device_printf(dev, "could not process 'reg' "
|
|
"property\n");
|
|
ofw_bus_gen_destroy_devinfo(&di->di_ofw);
|
|
free(di, M_LBC);
|
|
continue;
|
|
}
|
|
|
|
fdt_lbc_fixup(child, sc, di);
|
|
|
|
/* Add newbus device for this FDT node */
|
|
cdev = device_add_child(dev, NULL, -1);
|
|
if (cdev == NULL) {
|
|
device_printf(dev, "could not add child: %s\n",
|
|
di->di_ofw.obd_name);
|
|
resource_list_free(&di->di_res);
|
|
ofw_bus_gen_destroy_devinfo(&di->di_ofw);
|
|
free(di, M_LBC);
|
|
continue;
|
|
}
|
|
debugf("added child name='%s', node=%p\n", di->di_ofw.obd_name,
|
|
(void *)child);
|
|
device_set_ivars(cdev, di);
|
|
}
|
|
|
|
/*
|
|
* Enable the LBC.
|
|
*/
|
|
lbc_banks_enable(sc);
|
|
|
|
free(rangesptr, M_OFWPROP);
|
|
return (bus_generic_attach(dev));
|
|
|
|
fail:
|
|
free(rangesptr, M_OFWPROP);
|
|
bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_mrid, sc->sc_mres);
|
|
return (error);
|
|
}
|
|
|
|
static int
|
|
lbc_shutdown(device_t dev)
|
|
{
|
|
|
|
/* TODO */
|
|
return(0);
|
|
}
|
|
|
|
static struct resource *
|
|
lbc_alloc_resource(device_t bus, device_t child, int type, int *rid,
|
|
rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
|
|
{
|
|
struct lbc_softc *sc;
|
|
struct lbc_devinfo *di;
|
|
struct resource_list_entry *rle;
|
|
struct resource *res;
|
|
struct rman *rm;
|
|
int needactivate;
|
|
|
|
/* We only support default allocations. */
|
|
if (!RMAN_IS_DEFAULT_RANGE(start, end))
|
|
return (NULL);
|
|
|
|
sc = device_get_softc(bus);
|
|
if (type == SYS_RES_IRQ)
|
|
return (bus_alloc_resource(bus, type, rid, start, end, count,
|
|
flags));
|
|
|
|
/*
|
|
* Request for the default allocation with a given rid: use resource
|
|
* list stored in the local device info.
|
|
*/
|
|
if ((di = device_get_ivars(child)) == NULL)
|
|
return (NULL);
|
|
|
|
if (type == SYS_RES_IOPORT)
|
|
type = SYS_RES_MEMORY;
|
|
|
|
rid = &di->di_bank;
|
|
|
|
rle = resource_list_find(&di->di_res, type, *rid);
|
|
if (rle == NULL) {
|
|
device_printf(bus, "no default resources for "
|
|
"rid = %d, type = %d\n", *rid, type);
|
|
return (NULL);
|
|
}
|
|
start = rle->start;
|
|
count = rle->count;
|
|
end = start + count - 1;
|
|
|
|
sc = device_get_softc(bus);
|
|
|
|
needactivate = flags & RF_ACTIVE;
|
|
flags &= ~RF_ACTIVE;
|
|
|
|
rm = &sc->sc_rman;
|
|
|
|
res = rman_reserve_resource(rm, start, end, count, flags, child);
|
|
if (res == NULL) {
|
|
device_printf(bus, "failed to reserve resource %#jx - %#jx "
|
|
"(%#jx)\n", start, end, count);
|
|
return (NULL);
|
|
}
|
|
|
|
rman_set_rid(res, *rid);
|
|
rman_set_bustag(res, &bs_be_tag);
|
|
rman_set_bushandle(res, rman_get_start(res));
|
|
|
|
if (needactivate)
|
|
if (bus_activate_resource(child, type, *rid, res)) {
|
|
device_printf(child, "resource activation failed\n");
|
|
rman_release_resource(res);
|
|
return (NULL);
|
|
}
|
|
|
|
return (res);
|
|
}
|
|
|
|
static int
|
|
lbc_print_child(device_t dev, device_t child)
|
|
{
|
|
struct lbc_devinfo *di;
|
|
struct resource_list *rl;
|
|
int rv;
|
|
|
|
di = device_get_ivars(child);
|
|
rl = &di->di_res;
|
|
|
|
rv = 0;
|
|
rv += bus_print_child_header(dev, child);
|
|
rv += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx");
|
|
rv += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd");
|
|
rv += bus_print_child_footer(dev, child);
|
|
|
|
return (rv);
|
|
}
|
|
|
|
static int
|
|
lbc_release_resource(device_t dev, device_t child, int type, int rid,
|
|
struct resource *res)
|
|
{
|
|
int err;
|
|
|
|
if (rman_get_flags(res) & RF_ACTIVE) {
|
|
err = bus_deactivate_resource(child, type, rid, res);
|
|
if (err)
|
|
return (err);
|
|
}
|
|
|
|
return (rman_release_resource(res));
|
|
}
|
|
|
|
static int
|
|
lbc_activate_resource(device_t bus __unused, device_t child __unused,
|
|
int type __unused, int rid __unused, struct resource *r)
|
|
{
|
|
|
|
/* Child resources were already mapped, just activate. */
|
|
return (rman_activate_resource(r));
|
|
}
|
|
|
|
static int
|
|
lbc_deactivate_resource(device_t bus __unused, device_t child __unused,
|
|
int type __unused, int rid __unused, struct resource *r)
|
|
{
|
|
|
|
return (rman_deactivate_resource(r));
|
|
}
|
|
|
|
static const struct ofw_bus_devinfo *
|
|
lbc_get_devinfo(device_t bus, device_t child)
|
|
{
|
|
struct lbc_devinfo *di;
|
|
|
|
di = device_get_ivars(child);
|
|
return (&di->di_ofw);
|
|
}
|
|
|
|
void
|
|
lbc_write_reg(device_t child, u_int off, uint32_t val)
|
|
{
|
|
device_t dev;
|
|
struct lbc_softc *sc;
|
|
|
|
dev = device_get_parent(child);
|
|
|
|
if (off >= 0x1000) {
|
|
device_printf(dev, "%s(%s): invalid offset %#x\n",
|
|
__func__, device_get_nameunit(child), off);
|
|
return;
|
|
}
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
if (off == LBC85XX_LTESR && sc->sc_ltesr != ~0u) {
|
|
sc->sc_ltesr ^= (val & sc->sc_ltesr);
|
|
return;
|
|
}
|
|
|
|
if (off == LBC85XX_LTEATR && (val & 1) == 0)
|
|
sc->sc_ltesr = ~0u;
|
|
bus_space_write_4(sc->sc_bst, sc->sc_bsh, off, val);
|
|
}
|
|
|
|
uint32_t
|
|
lbc_read_reg(device_t child, u_int off)
|
|
{
|
|
device_t dev;
|
|
struct lbc_softc *sc;
|
|
uint32_t val;
|
|
|
|
dev = device_get_parent(child);
|
|
|
|
if (off >= 0x1000) {
|
|
device_printf(dev, "%s(%s): invalid offset %#x\n",
|
|
__func__, device_get_nameunit(child), off);
|
|
return (~0U);
|
|
}
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
if (off == LBC85XX_LTESR && sc->sc_ltesr != ~0U)
|
|
val = sc->sc_ltesr;
|
|
else
|
|
val = bus_space_read_4(sc->sc_bst, sc->sc_bsh, off);
|
|
return (val);
|
|
}
|