c8953e1273
Sponsored by: Plat'Home, Co.,Ltd.
456 lines
13 KiB
C
456 lines
13 KiB
C
/*-
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* Copyright (c) 2010 Alexander Motin <mav@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification, immediately at the beginning of the file.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/module.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/bus.h>
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#include <sys/endian.h>
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#include <sys/malloc.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <vm/uma.h>
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#include <machine/stdarg.h>
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#include <machine/resource.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <arm/mv/mvreg.h>
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#include <arm/mv/mvvar.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include "mvs.h"
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/* local prototypes */
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static int mvs_setup_interrupt(device_t dev);
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static void mvs_intr(void *data);
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static int mvs_suspend(device_t dev);
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static int mvs_resume(device_t dev);
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static int mvs_ctlr_setup(device_t dev);
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static struct {
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uint32_t id;
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uint8_t rev;
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const char *name;
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int ports;
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int quirks;
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} mvs_ids[] = {
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{MV_DEV_88F5182, 0x00, "Marvell 88F5182", 2, MVS_Q_GENIIE|MVS_Q_SOC},
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{MV_DEV_88F6281, 0x00, "Marvell 88F6281", 2, MVS_Q_GENIIE|MVS_Q_SOC},
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{MV_DEV_88F6282, 0x00, "Marvell 88F6282", 2, MVS_Q_GENIIE|MVS_Q_SOC},
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{MV_DEV_MV78100, 0x00, "Marvell MV78100", 2, MVS_Q_GENIIE|MVS_Q_SOC},
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{MV_DEV_MV78100_Z0, 0x00,"Marvell MV78100", 2, MVS_Q_GENIIE|MVS_Q_SOC},
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{0, 0x00, NULL, 0, 0}
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};
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static int
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mvs_probe(device_t dev)
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{
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char buf[64];
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int i;
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uint32_t devid, revid;
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if (!ofw_bus_is_compatible(dev, "mrvl,sata"))
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return (ENXIO);
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soc_id(&devid, &revid);
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for (i = 0; mvs_ids[i].id != 0; i++) {
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if (mvs_ids[i].id == devid &&
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mvs_ids[i].rev <= revid) {
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snprintf(buf, sizeof(buf), "%s SATA controller",
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mvs_ids[i].name);
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device_set_desc_copy(dev, buf);
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return (BUS_PROBE_VENDOR);
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}
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}
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return (ENXIO);
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}
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static int
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mvs_attach(device_t dev)
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{
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struct mvs_controller *ctlr = device_get_softc(dev);
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device_t child;
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int error, unit, i;
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uint32_t devid, revid;
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soc_id(&devid, &revid);
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ctlr->dev = dev;
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i = 0;
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while (mvs_ids[i].id != 0 &&
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(mvs_ids[i].id != devid ||
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mvs_ids[i].rev > revid))
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i++;
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ctlr->channels = mvs_ids[i].ports;
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ctlr->quirks = mvs_ids[i].quirks;
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resource_int_value(device_get_name(dev),
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device_get_unit(dev), "ccc", &ctlr->ccc);
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ctlr->cccc = 8;
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resource_int_value(device_get_name(dev),
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device_get_unit(dev), "cccc", &ctlr->cccc);
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if (ctlr->ccc == 0 || ctlr->cccc == 0) {
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ctlr->ccc = 0;
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ctlr->cccc = 0;
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}
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if (ctlr->ccc > 100000)
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ctlr->ccc = 100000;
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device_printf(dev,
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"Gen-%s, %d %sGbps ports, Port Multiplier %s%s\n",
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((ctlr->quirks & MVS_Q_GENI) ? "I" :
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((ctlr->quirks & MVS_Q_GENII) ? "II" : "IIe")),
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ctlr->channels,
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((ctlr->quirks & MVS_Q_GENI) ? "1.5" : "3"),
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((ctlr->quirks & MVS_Q_GENI) ?
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"not supported" : "supported"),
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((ctlr->quirks & MVS_Q_GENIIE) ?
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" with FBS" : ""));
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mtx_init(&ctlr->mtx, "MVS controller lock", NULL, MTX_DEF);
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/* We should have a memory BAR(0). */
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ctlr->r_rid = 0;
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if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
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&ctlr->r_rid, RF_ACTIVE)))
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return ENXIO;
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if (ATA_INL(ctlr->r_mem, PORT_BASE(0) + SATA_PHYCFG_OFS) != 0)
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ctlr->quirks |= MVS_Q_SOC65;
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/* Setup our own memory management for channels. */
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ctlr->sc_iomem.rm_start = rman_get_start(ctlr->r_mem);
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ctlr->sc_iomem.rm_end = rman_get_end(ctlr->r_mem);
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ctlr->sc_iomem.rm_type = RMAN_ARRAY;
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ctlr->sc_iomem.rm_descr = "I/O memory addresses";
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if ((error = rman_init(&ctlr->sc_iomem)) != 0) {
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bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
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return (error);
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}
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if ((error = rman_manage_region(&ctlr->sc_iomem,
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rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) {
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bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
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rman_fini(&ctlr->sc_iomem);
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return (error);
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}
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mvs_ctlr_setup(dev);
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/* Setup interrupts. */
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if (mvs_setup_interrupt(dev)) {
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bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
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rman_fini(&ctlr->sc_iomem);
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return ENXIO;
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}
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/* Attach all channels on this controller */
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for (unit = 0; unit < ctlr->channels; unit++) {
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child = device_add_child(dev, "mvsch", -1);
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if (child == NULL)
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device_printf(dev, "failed to add channel device\n");
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else
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device_set_ivars(child, (void *)(intptr_t)unit);
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}
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bus_generic_attach(dev);
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return 0;
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}
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static int
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mvs_detach(device_t dev)
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{
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struct mvs_controller *ctlr = device_get_softc(dev);
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/* Detach & delete all children */
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device_delete_children(dev);
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/* Free interrupt. */
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if (ctlr->irq.r_irq) {
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bus_teardown_intr(dev, ctlr->irq.r_irq,
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ctlr->irq.handle);
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bus_release_resource(dev, SYS_RES_IRQ,
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ctlr->irq.r_irq_rid, ctlr->irq.r_irq);
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}
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/* Free memory. */
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rman_fini(&ctlr->sc_iomem);
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if (ctlr->r_mem)
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bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
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mtx_destroy(&ctlr->mtx);
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return (0);
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}
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static int
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mvs_ctlr_setup(device_t dev)
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{
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struct mvs_controller *ctlr = device_get_softc(dev);
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int ccc = ctlr->ccc, cccc = ctlr->cccc, ccim = 0;
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/* Mask chip interrupts */
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ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, 0x00000000);
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/* Clear HC interrupts */
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ATA_OUTL(ctlr->r_mem, HC_IC, 0x00000000);
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/* Clear chip interrupts */
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ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIC, 0);
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/* Configure per-HC CCC */
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if (ccc && bootverbose) {
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device_printf(dev,
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"CCC with %dus/%dcmd enabled\n",
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ctlr->ccc, ctlr->cccc);
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}
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ccc *= 150;
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ATA_OUTL(ctlr->r_mem, HC_ICT, cccc);
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ATA_OUTL(ctlr->r_mem, HC_ITT, ccc);
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if (ccc)
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ccim |= IC_HC0_COAL_DONE;
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/* Enable chip interrupts */
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ctlr->gmim = ((ccc ? IC_HC0_COAL_DONE :
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(IC_DONE_HC0 & CHIP_SOC_HC0_MASK(ctlr->channels))) |
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(IC_ERR_HC0 & CHIP_SOC_HC0_MASK(ctlr->channels)));
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ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, ctlr->gmim | ctlr->pmim);
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return (0);
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}
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static void
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mvs_edma(device_t dev, device_t child, int mode)
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{
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struct mvs_controller *ctlr = device_get_softc(dev);
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int unit = ((struct mvs_channel *)device_get_softc(child))->unit;
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int bit = IC_DONE_IRQ << (unit * 2);
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if (ctlr->ccc == 0)
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return;
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/* CCC is not working for non-EDMA mode. Unmask device interrupts. */
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mtx_lock(&ctlr->mtx);
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if (mode == MVS_EDMA_OFF)
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ctlr->pmim |= bit;
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else
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ctlr->pmim &= ~bit;
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ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, ctlr->gmim | ctlr->pmim);
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mtx_unlock(&ctlr->mtx);
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}
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static int
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mvs_suspend(device_t dev)
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{
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struct mvs_controller *ctlr = device_get_softc(dev);
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bus_generic_suspend(dev);
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/* Mask chip interrupts */
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ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, 0x00000000);
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return 0;
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}
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static int
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mvs_resume(device_t dev)
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{
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mvs_ctlr_setup(dev);
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return (bus_generic_resume(dev));
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}
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static int
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mvs_setup_interrupt(device_t dev)
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{
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struct mvs_controller *ctlr = device_get_softc(dev);
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/* Allocate all IRQs. */
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ctlr->irq.r_irq_rid = 0;
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if (!(ctlr->irq.r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
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&ctlr->irq.r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) {
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device_printf(dev, "unable to map interrupt\n");
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return (ENXIO);
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}
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if ((bus_setup_intr(dev, ctlr->irq.r_irq, ATA_INTR_FLAGS, NULL,
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mvs_intr, ctlr, &ctlr->irq.handle))) {
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device_printf(dev, "unable to setup interrupt\n");
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bus_release_resource(dev, SYS_RES_IRQ,
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ctlr->irq.r_irq_rid, ctlr->irq.r_irq);
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ctlr->irq.r_irq = 0;
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return (ENXIO);
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}
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return (0);
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}
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/*
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* Common case interrupt handler.
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*/
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static void
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mvs_intr(void *data)
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{
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struct mvs_controller *ctlr = data;
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struct mvs_intr_arg arg;
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void (*function)(void *);
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int p, chan_num;
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u_int32_t ic, aic;
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ic = ATA_INL(ctlr->r_mem, CHIP_SOC_MIC);
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if ((ic & IC_HC0) == 0)
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return;
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/* Acknowledge interrupts of this HC. */
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aic = 0;
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/* Processing interrupts from each initialized channel */
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for (chan_num = 0; chan_num < ctlr->channels; chan_num++) {
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if (ic & (IC_DONE_IRQ << (chan_num * 2)))
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aic |= HC_IC_DONE(chan_num) | HC_IC_DEV(chan_num);
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}
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if (ic & IC_HC0_COAL_DONE)
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aic |= HC_IC_COAL;
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ATA_OUTL(ctlr->r_mem, HC_IC, ~aic);
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/* Call per-port interrupt handler. */
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for (p = 0; p < ctlr->channels; p++) {
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arg.cause = ic & (IC_ERR_IRQ|IC_DONE_IRQ);
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if ((arg.cause != 0) &&
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(function = ctlr->interrupt[p].function)) {
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arg.arg = ctlr->interrupt[p].argument;
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function(&arg);
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}
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ic >>= 2;
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}
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}
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static struct resource *
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mvs_alloc_resource(device_t dev, device_t child, int type, int *rid,
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u_long start, u_long end, u_long count, u_int flags)
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{
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struct mvs_controller *ctlr = device_get_softc(dev);
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int unit = ((struct mvs_channel *)device_get_softc(child))->unit;
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struct resource *res = NULL;
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int offset = PORT_BASE(unit & 0x03);
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long st;
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switch (type) {
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case SYS_RES_MEMORY:
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st = rman_get_start(ctlr->r_mem);
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res = rman_reserve_resource(&ctlr->sc_iomem, st + offset,
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st + offset + PORT_SIZE - 1, PORT_SIZE, RF_ACTIVE, child);
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if (res) {
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bus_space_handle_t bsh;
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bus_space_tag_t bst;
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bsh = rman_get_bushandle(ctlr->r_mem);
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bst = rman_get_bustag(ctlr->r_mem);
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bus_space_subregion(bst, bsh, offset, PORT_SIZE, &bsh);
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rman_set_bushandle(res, bsh);
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rman_set_bustag(res, bst);
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}
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break;
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case SYS_RES_IRQ:
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if (*rid == ATA_IRQ_RID)
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res = ctlr->irq.r_irq;
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break;
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}
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return (res);
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}
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static int
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mvs_release_resource(device_t dev, device_t child, int type, int rid,
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struct resource *r)
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{
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switch (type) {
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case SYS_RES_MEMORY:
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rman_release_resource(r);
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return (0);
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case SYS_RES_IRQ:
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if (rid != ATA_IRQ_RID)
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return ENOENT;
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return (0);
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}
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return (EINVAL);
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}
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static int
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mvs_setup_intr(device_t dev, device_t child, struct resource *irq,
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int flags, driver_filter_t *filter, driver_intr_t *function,
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void *argument, void **cookiep)
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{
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struct mvs_controller *ctlr = device_get_softc(dev);
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int unit = (intptr_t)device_get_ivars(child);
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if (filter != NULL) {
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printf("mvs.c: we cannot use a filter here\n");
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return (EINVAL);
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}
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ctlr->interrupt[unit].function = function;
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ctlr->interrupt[unit].argument = argument;
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return (0);
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}
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static int
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mvs_teardown_intr(device_t dev, device_t child, struct resource *irq,
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void *cookie)
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{
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struct mvs_controller *ctlr = device_get_softc(dev);
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int unit = (intptr_t)device_get_ivars(child);
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ctlr->interrupt[unit].function = NULL;
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ctlr->interrupt[unit].argument = NULL;
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return (0);
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}
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static int
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mvs_print_child(device_t dev, device_t child)
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{
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int retval;
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retval = bus_print_child_header(dev, child);
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retval += printf(" at channel %d",
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(int)(intptr_t)device_get_ivars(child));
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retval += bus_print_child_footer(dev, child);
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return (retval);
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}
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static int
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mvs_child_location_str(device_t dev, device_t child, char *buf,
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size_t buflen)
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{
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snprintf(buf, buflen, "channel=%d",
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(int)(intptr_t)device_get_ivars(child));
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return (0);
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}
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static device_method_t mvs_methods[] = {
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DEVMETHOD(device_probe, mvs_probe),
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DEVMETHOD(device_attach, mvs_attach),
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DEVMETHOD(device_detach, mvs_detach),
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DEVMETHOD(device_suspend, mvs_suspend),
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DEVMETHOD(device_resume, mvs_resume),
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DEVMETHOD(bus_print_child, mvs_print_child),
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DEVMETHOD(bus_alloc_resource, mvs_alloc_resource),
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DEVMETHOD(bus_release_resource, mvs_release_resource),
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DEVMETHOD(bus_setup_intr, mvs_setup_intr),
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DEVMETHOD(bus_teardown_intr,mvs_teardown_intr),
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DEVMETHOD(mvs_edma, mvs_edma),
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DEVMETHOD(bus_child_location_str, mvs_child_location_str),
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{ 0, 0 }
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};
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static driver_t mvs_driver = {
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"mvs",
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mvs_methods,
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sizeof(struct mvs_controller)
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};
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DRIVER_MODULE(mvs, simplebus, mvs_driver, mvs_devclass, 0, 0);
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MODULE_VERSION(mvs, 1);
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MODULE_DEPEND(mvs, cam, 1, 1, 1);
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