freebsd-dev/sys/pc98
Marcel Moolenaar dbb95048da Add cpu_flush_dcache() for use after non-DMA based I/O so that a
possible future I-cache coherency operation can succeed. On ARM
for example the L1 cache can be (is) virtually mapped, which
means that any I/O that uses temporary mappings will not see the
I-cache made coherent. On ia64 a similar behaviour has been
observed. By flushing the D-cache, execution of binaries backed
by md(4) and/or NFS work reliably.
For Book-E (powerpc), execution over NFS exhibits SIGILL once in
a while as well, though cpu_flush_dcache() hasn't been implemented
yet.

Doing an explicit D-cache flush as part of the non-DMA based I/O
read operation eliminates the need to do it as part of the
I-cache coherency operation itself and as such avoids pessimizing
the DMA-based I/O read operations for which D-cache are already
flushed/invalidated. It also allows future optimizations whereby
the bcopy() followed by the D-cache flush can be integrated in a
single operation, which could be implemented using on-chips DMA
engines, by-passing the D-cache altogether.
2009-05-18 18:37:18 +00:00
..
apm
cbus Reduce diffs against i386. 2009-05-06 04:40:18 +00:00
compile
conf - Use "device\t" and "options \t" for consistency. 2009-05-10 00:00:25 +00:00
include MFi386: revision 192050 2009-05-14 16:01:29 +00:00
linux
pc98 Add cpu_flush_dcache() for use after non-DMA based I/O so that a 2009-05-18 18:37:18 +00:00