664a749708
This defines a new bhnd_erom_if API, providing a common interface to device enumeration on siba(4) and bcma(4) devices, for use both in the bhndb bridge and SoC early boot contexts, and migrates mips/broadcom over to the new API. This also replaces the previous adhoc device enumeration support implemented for mips/broadcom. Migration of bhndb to the new API will be implemented in a follow-up commit. - Defined new bhnd_erom_if interface for bhnd(4) device enumeration, along with bcma(4) and siba(4)-specific implementations. - Fixed a minor bug in bhndb that logged an error when we attempted to map the full siba(4) bus space (18000000-17FFFFFF) in the siba EROM parser. - Reverted use of the resource's start address as the ChipCommon enum_addr in bhnd_read_chipid(). When called from bhndb, this address is found within the host address space, resulting in an invalid bridged enum_addr. - Added support for falling back on standard bus_activate_resource() in bhnd_bus_generic_activate_resource(), enabling allocation of the bhnd_erom's bhnd_resource directly from a nexus-attached bhnd(4) device. - Removed BHND_BUS_GET_CORE_TABLE(); it has been replaced by the erom API. - Added support for statically initializing bhnd_erom instances, for use prior to malloc availability. The statically allocated buffer size is verified both at runtime, and via a compile-time assertion (see BHND_EROM_STATIC_BYTES). - bhnd_erom classes are registered within a module via a linker set, allowing mips/broadcom to probe available EROM parser instances without creating a strong reference to bcma/siba-specific symbols. - Migrated mips/broadcom to bhnd_erom_if, replacing the previous MIPS-specific device enumeration implementation. Approved by: adrian (mentor) Differential Revision: https://reviews.freebsd.org/D7748
115 lines
4.0 KiB
C
115 lines
4.0 KiB
C
/*-
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* Copyright (c) 2016 Landon Fuller <landonf@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
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* redistribution must be conditioned upon including a substantially
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* similar Disclaimer requirement for further binary redistribution.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
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* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGES.
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*
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* $FreeBSD$
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*/
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#ifndef _MIPS_BROADCOM_BCM_MACHDEP_H_
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#define _MIPS_BROADCOM_BCM_MACHDEP_H_
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#include <machine/cpufunc.h>
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#include <machine/cpuregs.h>
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#include <dev/bhnd/bhnd.h>
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#include <dev/bhnd/bhnd_erom.h>
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#include <dev/bhnd/cores/pmu/bhnd_pmuvar.h>
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extern const struct bhnd_pmu_io bcm_pmu_soc_io;
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struct bcm_platform {
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struct bhnd_chipid cid; /**< chip id */
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struct bhnd_core_info cc_id; /**< chipc core info */
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uintptr_t cc_addr; /**< chipc core phys address */
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uint32_t cc_caps; /**< chipc capabilities */
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uint32_t cc_caps_ext; /**< chipc extended capabilies */
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/* On non-AOB devices, the PMU register block is mapped to chipc;
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* the pmu_id and pmu_addr values will be copied from cc_id
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* and cc_addr. */
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struct bhnd_core_info pmu_id; /**< PMU core info */
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uintptr_t pmu_addr; /**< PMU core phys address, or
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0x0 if no PMU */
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struct bhnd_pmu_query pmu; /**< PMU query instance */
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bhnd_erom_class_t *erom_impl; /**< erom parser class */
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struct kobj_ops erom_ops; /**< compiled kobj opcache */
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union {
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bhnd_erom_static_t data;
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bhnd_erom_t obj;
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} erom;
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#ifdef CFE
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int cfe_console; /**< Console handle, or -1 */
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#endif
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};
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struct bcm_platform *bcm_get_platform(void);
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uint64_t bcm_get_cpufreq(struct bcm_platform *bp);
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uint64_t bcm_get_sifreq(struct bcm_platform *bp);
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uint64_t bcm_get_alpfreq(struct bcm_platform *bp);
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uint64_t bcm_get_ilpfreq(struct bcm_platform *bp);
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u_int bcm_get_uart_rclk(struct bcm_platform *bp);
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#define BCM_ERR(fmt, ...) \
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printf("%s: " fmt, __FUNCTION__, ##__VA_ARGS__)
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#define BCM_SOC_BSH(_addr, _offset) \
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((bus_space_handle_t)BCM_SOC_ADDR((_addr), (_offset)))
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#define BCM_SOC_ADDR(_addr, _offset) \
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MIPS_PHYS_TO_KSEG1((_addr) + (_offset))
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#define BCM_SOC_READ_4(_addr, _offset) \
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readl(BCM_SOC_ADDR((_addr), (_offset)))
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#define BCM_SOC_WRITE_4(_addr, _reg, _val) \
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writel(BCM_SOC_ADDR((_addr), (_offset)), (_val))
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#define BCM_CORE_ADDR(_bp, _name, _reg) \
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BCM_SOC_ADDR(_bp->_name, (_reg))
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#define BCM_CORE_READ_4(_bp, _name, _reg) \
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readl(BCM_CORE_ADDR(_bp, _name, (_reg)))
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#define BCM_CORE_WRITE_4(_bp, _name, _reg, _val) \
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writel(BCM_CORE_ADDR(_bp, _name, (_reg)), (_val))
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#define BCM_CHIPC_READ_4(_bp, _reg) \
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BCM_CORE_READ_4(_bp, cc_addr, (_reg))
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#define BCM_CHIPC_WRITE_4(_bp, _reg, _val) \
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BCM_CORE_WRITE_4(_bp, cc_addr, (_reg), (_val))
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#define BCM_PMU_READ_4(_bp, _reg) \
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BCM_CORE_READ_4(_bp, pmu_addr, (_reg))
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#define BCM_PMU_WRITE_4(_bp, _reg, _val) \
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BCM_CORE_WRITE_4(_bp, pmu_addr, (_reg), (_val))
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#endif /* _MIPS_BROADCOM_BCM_MACHDEP_H_ */
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