3f0ddc7c5c
The handlers are now called after the register value is updated in the virtual APIC page. This will make it easier to handle APIC-write VM-exits with APIC register virtualization turned on. Additionally, we need to ensure that the value of these registers is always correctly reflected in the virtual APIC page, because there is no VM exit when the guest reads these registers with APIC register virtualization.
79 lines
3.1 KiB
C
79 lines
3.1 KiB
C
/*-
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* Copyright (c) 2011 NetApp, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _VLAPIC_H_
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#define _VLAPIC_H_
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struct vm;
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enum x2apic_state;
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int vlapic_write(struct vlapic *vlapic, uint64_t offset, uint64_t data,
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bool *retu);
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int vlapic_read(struct vlapic *vlapic, uint64_t offset, uint64_t *data,
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bool *retu);
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/*
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* Returns a vector between 32 and 255 if an interrupt is pending in the
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* IRR that can be delivered based on the current state of ISR and TPR.
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*
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* Note that the vector does not automatically transition to the ISR as a
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* result of calling this function.
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*
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* Returns -1 if there is no eligible vector that can be delivered to the
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* guest at this time.
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*/
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int vlapic_pending_intr(struct vlapic *vlapic);
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/*
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* Transition 'vector' from IRR to ISR. This function is called with the
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* vector returned by 'vlapic_pending_intr()' when the guest is able to
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* accept this interrupt (i.e. RFLAGS.IF = 1 and no conditions exist that
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* block interrupt delivery).
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*/
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void vlapic_intr_accepted(struct vlapic *vlapic, int vector);
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void vlapic_set_intr_ready(struct vlapic *vlapic, int vector, bool level);
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void vlapic_set_error(struct vlapic *vlapic, uint32_t mask);
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void vlapic_fire_cmci(struct vlapic *vlapic);
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int vlapic_trigger_lvt(struct vlapic *vlapic, int vector);
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uint64_t vlapic_get_apicbase(struct vlapic *vlapic);
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void vlapic_set_apicbase(struct vlapic *vlapic, uint64_t val);
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void vlapic_set_x2apic_state(struct vm *vm, int vcpuid, enum x2apic_state s);
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bool vlapic_enabled(struct vlapic *vlapic);
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void vlapic_deliver_intr(struct vm *vm, bool level, uint32_t dest, bool phys,
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int delmode, int vec);
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void vlapic_post_intr(struct vlapic *vlapic, int hostcpu);
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/* APIC write handlers */
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void vlapic_id_write_handler(struct vlapic *vlapic);
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void vlapic_ldr_write_handler(struct vlapic *vlapic);
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void vlapic_dfr_write_handler(struct vlapic *vlapic);
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#endif /* _VLAPIC_H_ */
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