187 lines
5.1 KiB
Plaintext
187 lines
5.1 KiB
Plaintext
/*-
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* Copyright (c) 2011 The FreeBSD Foundation
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* All rights reserved.
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*
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* Developed by Damjan Marion <damjan.marion@gmail.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/dts-v1/;
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/ {
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model = "pandaboard";
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compatible = "pandaboard", "ti,omap4430";
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&GIC>;
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aliases {
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soc = &SOC;
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uart3 = &uart3;
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};
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memory {
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device_type = "memory";
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reg = < 0x80000000 0x40000000 >; /* 1GB RAM at 0x0 */
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};
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SOC: omap4430 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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bus-frequency = <0>;
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GIC: interrupt-controller@48241000 {
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compatible = "arm,gic";
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <1>;
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reg = < 0x48241000 0x1000 >, /* Distributor Registers */
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< 0x48240100 0x0100 >; /* CPU Interface Registers */
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};
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pl310@48242000 {
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compatible = "arm,pl310";
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reg = < 0x48242000 0x1000 >;
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interrupts = < 32 >;
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interrupt-parent = < &GIC >;
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};
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mp_tmr@48240200 {
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compatible = "arm,mpcore-timers";
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clock-frequency = < 504000000 >;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = < 0x48240200 0x100 >, /* Global Timer Registers */
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< 0x48240600 0x100 >; /* Private Timer Registers */
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interrupts = < 27 29 >;
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interrupt-parent = < &GIC >;
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};
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uart3: serial@48020000 {
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compatible = "ns16550";
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reg = <0x48020000 0x1000>;
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reg-shift = <2>;
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interrupts = < 106 >;
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interrupt-parent = <&GIC>;
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clock-frequency = < 48000000 >; /* 48Mhz clock for all uarts */
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/* (techref 17.3.1.1) */
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};
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scm@4a100000 {
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compatible = "ti,scm";
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reg = < 0x4a100000 0x1000 >;
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/* Set of triplets < padname, muxname, padstate> */
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scm-pad-config =
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"ag19", "usbb1_ulpiphy_stp", "output",
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"ae18", "usbb1_ulpiphy_clk", "input_pulldown",
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"af19", "usbb1_ulpiphy_dir", "input_pulldown",
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"ae19", "usbb1_ulpiphy_nxt", "input_pulldown",
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"af18", "usbb1_ulpiphy_dat0", "input_pulldown",
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"ag18", "usbb1_ulpiphy_dat1", "input_pulldown",
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"ae17", "usbb1_ulpiphy_dat2", "input_pulldown",
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"af17", "usbb1_ulpiphy_dat3", "input_pulldown",
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"ah17", "usbb1_ulpiphy_dat4", "input_pulldown",
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"ae16", "usbb1_ulpiphy_dat5", "input_pulldown",
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"af16", "usbb1_ulpiphy_dat6", "input_pulldown",
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"ag16", "usbb1_ulpiphy_dat7", "input_pulldown";
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};
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omap4_prcm@4a306000 {
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compatible = "ti,omap4_prcm";
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reg =< 0x4a306000 0x2000
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0x4a004000 0x1000
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0x4a008000 0x8000>;
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};
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GPIO: gpio {
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#gpio-cells = <3>;
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compatible = "ti,gpio";
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gpio-controller;
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reg =< 0x4a310000 0x1000
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0x48055000 0x1000
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0x48057000 0x1000
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0x48059000 0x1000
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0x4805b000 0x1000
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0x4805d000 0x1000>;
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interrupts = <61 62 63 64 65 66>;
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interrupt-parent = <&GIC>;
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};
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ehci {
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compatible = "ti,usb-ehci", "usb-ehci";
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/*
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* USB port PHY configuration is a tuple: <mode, reset, gpio_pin>
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* mode is one of the following values:
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* 0 - unknown
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* 1 - PHY
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* 2 - TLL
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* 3 - HSIC
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*
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* reset indicates (if non-zero) if port reset is required
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* gpio_pin - GPIO pin that is used to perform reset
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*/
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phy-config = < 1 0 0
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0 0 0
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0 0 0>;
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reg = < 0x4a064c00 0x100 /* EHCI regs */
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0x4a064000 0x700 /* UHH regs */
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0x4a062000 0x1000>; /* TLL regs */
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interrupts = <109>;
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interrupt-parent = <&GIC>;
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};
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I2C1: i2c@x48070000 {
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compatible = "ti,i2c";
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reg =< 0x48070000 0x100 >;
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interrupts = <88>;
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interrupt-parent = <&GIC>;
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i2c-device-id = <1>;
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};
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sdma@x48070000 {
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compatible = "ti,sdma";
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reg =< 0x4A056000 0x1000 >;
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interrupts = <44 45 46 47>;
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interrupt-parent = <&GIC>;
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};
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mmc@x4809C000 {
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compatible = "ti,mmchs";
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reg =<0x4809C000 0x1000 >;
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interrupts = <115>;
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interrupt-parent = <&GIC>;
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mmchs-device-id = <1>;
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};
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};
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chosen {
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stdin = "uart3";
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stdout = "uart3";
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};
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};
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