tmm 3fdc9c3d48 Exclude yet more interrupt mapping registers from the OBIO INO search, ... namely the ones for the timers, error handling and power management. The registers for the timers, power management and PCI bus b errors are reserved on Sabres (US-IIi) and can lead to false matches there. Since all of them are never used for devices on the bus, they can be omitted safely. Approved by: re		2002-12-06 13:16:52 +00:00
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compile	Obrien created this directory, but I didn't cvs add cvsignore	2001-07-01 23:37:03 +00:00
conf	Add COMPAT_FREEBSD4 for the transition. COMPAT_43 was already present.	2002-10-26 04:57:19 +00:00
ebus	Add two new workaround for firmware anomalies:	2002-11-07 16:07:46 +00:00
include	Always initialize the UPA target module id in the interrupt mapping	2002-12-01 23:30:26 +00:00
isa	Add two new workaround for firmware anomalies:	2002-11-07 16:07:46 +00:00
pci	Exclude yet more interrupt mapping registers from the OBIO INO search,	2002-12-06 13:16:52 +00:00
sbus	Always initialize the UPA target module id in the interrupt mapping	2002-12-01 23:30:26 +00:00
sparc64	Remove a workaround for a binutils bug that was fixed in the recent	2002-12-02 18:56:30 +00:00