11a91bffe5
both newbus types and OFW types. This involves either including <machine/bus.h> or <dev/ofw/openfirm.h>. Reviewed by: jake, jmg, tmm
257 lines
6.6 KiB
C
257 lines
6.6 KiB
C
/*
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* Copyright (C) 2001 Eduardo Horvath.
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* All rights reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: NetBSD: if_gem_pci.c,v 1.7 2001/10/18 15:09:15 thorpej Exp
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*
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* PCI bindings for Sun GEM ethernet controllers.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/resource.h>
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#include <sys/socket.h>
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#include <machine/endian.h>
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#include <net/ethernet.h>
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#include <net/if.h>
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#include <net/if_arp.h>
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#include <net/if_dl.h>
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#include <net/if_media.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <dev/ofw/openfirm.h>
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#include <machine/ofw_machdep.h>
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#include <sys/rman.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include <dev/gem/if_gemreg.h>
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#include <dev/gem/if_gemvar.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include "miibus_if.h"
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struct gem_pci_softc {
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struct gem_softc gsc_gem; /* GEM device */
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struct resource *gsc_sres;
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int gsc_srid;
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struct resource *gsc_ires;
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int gsc_irid;
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void *gsc_ih;
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};
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static int gem_pci_probe(device_t);
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static int gem_pci_attach(device_t);
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static int gem_pci_detach(device_t);
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static int gem_pci_suspend(device_t);
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static int gem_pci_resume(device_t);
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static device_method_t gem_pci_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, gem_pci_probe),
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DEVMETHOD(device_attach, gem_pci_attach),
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DEVMETHOD(device_detach, gem_pci_detach),
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DEVMETHOD(device_suspend, gem_pci_suspend),
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DEVMETHOD(device_resume, gem_pci_resume),
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/* Use the suspend handler here, it is all that is required. */
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DEVMETHOD(device_shutdown, gem_pci_suspend),
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/* bus interface */
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DEVMETHOD(bus_print_child, bus_generic_print_child),
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DEVMETHOD(bus_driver_added, bus_generic_driver_added),
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/* MII interface */
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DEVMETHOD(miibus_readreg, gem_mii_readreg),
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DEVMETHOD(miibus_writereg, gem_mii_writereg),
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DEVMETHOD(miibus_statchg, gem_mii_statchg),
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{ 0, 0 }
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};
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static driver_t gem_pci_driver = {
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"gem",
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gem_pci_methods,
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sizeof(struct gem_pci_softc)
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};
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DRIVER_MODULE(gem, pci, gem_pci_driver, gem_devclass, 0, 0);
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MODULE_DEPEND(gem, pci, 1, 1, 1);
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MODULE_DEPEND(gem, ether, 1, 1, 1);
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struct gem_pci_dev {
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u_int32_t gpd_devid;
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int gpd_variant;
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char *gpd_desc;
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} gem_pci_devlist[] = {
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{ 0x1101108e, GEM_SUN_GEM, "Sun ERI 10/100 Ethernet Adaptor" },
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{ 0x2bad108e, GEM_SUN_GEM, "Sun GEM Gigabit Ethernet Adaptor" },
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{ 0x0021106b, GEM_APPLE_GMAC, "Apple GMAC Ethernet Adaptor" },
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{ 0x0024106b, GEM_APPLE_GMAC, "Apple GMAC2 Ethernet Adaptor" },
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{ 0, NULL }
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};
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/*
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* Attach routines need to be split out to different bus-specific files.
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*/
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static int
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gem_pci_probe(dev)
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device_t dev;
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{
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int i;
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u_int32_t devid;
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struct gem_pci_softc *gsc;
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devid = pci_get_devid(dev);
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for (i = 0; gem_pci_devlist[i].gpd_desc != NULL; i++) {
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if (devid == gem_pci_devlist[i].gpd_devid) {
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device_set_desc(dev, gem_pci_devlist[i].gpd_desc);
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gsc = device_get_softc(dev);
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gsc->gsc_gem.sc_variant =
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gem_pci_devlist[i].gpd_variant;
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return (0);
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}
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}
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return (ENXIO);
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}
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static int
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gem_pci_attach(dev)
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device_t dev;
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{
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struct gem_pci_softc *gsc = device_get_softc(dev);
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struct gem_softc *sc = &gsc->gsc_gem;
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pci_enable_busmaster(dev);
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/*
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* Some Sun GEMs/ERIs do have their intpin register bogusly set to 0,
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* although it should be 1. correct that.
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*/
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if (pci_get_intpin(dev) == 0)
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pci_set_intpin(dev, 1);
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sc->sc_dev = dev;
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sc->sc_pci = 1; /* XXX */
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gsc->gsc_srid = PCI_GEM_BASEADDR;
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gsc->gsc_sres = bus_alloc_resource(dev, SYS_RES_MEMORY, &gsc->gsc_srid,
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0, ~0, 1, RF_ACTIVE);
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if (gsc->gsc_sres == NULL) {
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device_printf(dev, "failed to allocate bus space resource\n");
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return (ENXIO);
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}
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gsc->gsc_irid = 0;
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gsc->gsc_ires = bus_alloc_resource(dev, SYS_RES_IRQ, &gsc->gsc_irid, 0,
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~0, 1, RF_SHAREABLE | RF_ACTIVE);
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if (gsc->gsc_ires == NULL) {
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device_printf(dev, "failed to allocate interrupt resource\n");
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goto fail_sres;
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}
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sc->sc_bustag = rman_get_bustag(gsc->gsc_sres);
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sc->sc_h = rman_get_bushandle(gsc->gsc_sres);
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/* All platform that this driver is used on must provide this. */
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OF_getetheraddr(dev, sc->sc_arpcom.ac_enaddr);
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/*
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* call the main configure
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*/
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if (gem_attach(sc) != 0) {
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device_printf(dev, "could not be configured\n");
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goto fail_ires;
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}
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if (bus_setup_intr(dev, gsc->gsc_ires, INTR_TYPE_NET, gem_intr, sc,
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&gsc->gsc_ih) != 0) {
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device_printf(dev, "failed to set up interrupt\n");
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gem_detach(sc);
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goto fail_ires;
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}
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return (0);
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fail_ires:
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bus_release_resource(dev, SYS_RES_IRQ, gsc->gsc_irid, gsc->gsc_ires);
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fail_sres:
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bus_release_resource(dev, SYS_RES_MEMORY, gsc->gsc_srid, gsc->gsc_sres);
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return (ENXIO);
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}
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static int
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gem_pci_detach(dev)
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device_t dev;
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{
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struct gem_pci_softc *gsc = device_get_softc(dev);
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struct gem_softc *sc = &gsc->gsc_gem;
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gem_detach(sc);
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bus_teardown_intr(dev, gsc->gsc_ires, gsc->gsc_ih);
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bus_release_resource(dev, SYS_RES_IRQ, gsc->gsc_irid, gsc->gsc_ires);
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bus_release_resource(dev, SYS_RES_MEMORY, gsc->gsc_srid, gsc->gsc_sres);
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return (0);
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}
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static int
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gem_pci_suspend(dev)
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device_t dev;
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{
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struct gem_pci_softc *gsc = device_get_softc(dev);
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struct gem_softc *sc = &gsc->gsc_gem;
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gem_suspend(sc);
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return (0);
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}
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static int
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gem_pci_resume(dev)
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device_t dev;
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{
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struct gem_pci_softc *gsc = device_get_softc(dev);
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struct gem_softc *sc = &gsc->gsc_gem;
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gem_resume(sc);
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return (0);
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}
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