fc2a8776a2
assym is only to be included by other .s files, and should never actually be assembled by itself. Reviewed by: imp, bdrewery (earlier) Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D14180
226 lines
6.8 KiB
ArmAsm
226 lines
6.8 KiB
ArmAsm
/*-
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* Copyright (c) 2011 Oleksandr Tymoshenko
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <machine/asm.h>
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#include <mips/cavium/octeon_cop2.h>
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#include "assym.inc"
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.set noreorder
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#define SAVE_COP2_REGISTER(reg) \
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dmfc2 t1, reg; sd t1, reg##_OFFSET(a0)
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#define RESTORE_COP2_REGISTER(reg) \
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ld t1, reg##_OFFSET(a0); dmtc2 t1, reg##_SET
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LEAF(octeon_cop2_save)
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/* Get CvmCtl register */
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dmfc0 t0, $9, 7
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/* CRC state */
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SAVE_COP2_REGISTER(COP2_CRC_IV)
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SAVE_COP2_REGISTER(COP2_CRC_LENGTH)
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SAVE_COP2_REGISTER(COP2_CRC_POLY)
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/* if CvmCtl[NODFA_CP2] -> save_nodfa */
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bbit1 t0, 28, save_nodfa
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nop
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/* LLM state */
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SAVE_COP2_REGISTER(COP2_LLM_DAT0)
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SAVE_COP2_REGISTER(COP2_LLM_DAT1)
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save_nodfa:
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/* crypto stuff is irrelevant if CvmCtl[NOCRYPTO] */
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bbit1 t0, 26, save_done
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nop
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SAVE_COP2_REGISTER(COP2_3DES_IV)
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SAVE_COP2_REGISTER(COP2_3DES_KEY0)
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SAVE_COP2_REGISTER(COP2_3DES_KEY1)
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SAVE_COP2_REGISTER(COP2_3DES_KEY2)
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SAVE_COP2_REGISTER(COP2_3DES_RESULT)
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SAVE_COP2_REGISTER(COP2_AES_INP0)
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SAVE_COP2_REGISTER(COP2_AES_IV0)
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SAVE_COP2_REGISTER(COP2_AES_IV1)
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SAVE_COP2_REGISTER(COP2_AES_KEY0)
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SAVE_COP2_REGISTER(COP2_AES_KEY1)
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SAVE_COP2_REGISTER(COP2_AES_KEY2)
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SAVE_COP2_REGISTER(COP2_AES_KEY3)
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SAVE_COP2_REGISTER(COP2_AES_KEYLEN)
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SAVE_COP2_REGISTER(COP2_AES_RESULT0)
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SAVE_COP2_REGISTER(COP2_AES_RESULT1)
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dmfc0 t0, $15
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li t1, 0x000d0000 /* Octeon Pass1 */
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beq t0, t1, save_pass1
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nop
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SAVE_COP2_REGISTER(COP2_HSH_DATW0)
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SAVE_COP2_REGISTER(COP2_HSH_DATW1)
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SAVE_COP2_REGISTER(COP2_HSH_DATW2)
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SAVE_COP2_REGISTER(COP2_HSH_DATW3)
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SAVE_COP2_REGISTER(COP2_HSH_DATW4)
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SAVE_COP2_REGISTER(COP2_HSH_DATW5)
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SAVE_COP2_REGISTER(COP2_HSH_DATW6)
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SAVE_COP2_REGISTER(COP2_HSH_DATW7)
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SAVE_COP2_REGISTER(COP2_HSH_DATW8)
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SAVE_COP2_REGISTER(COP2_HSH_DATW9)
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SAVE_COP2_REGISTER(COP2_HSH_DATW10)
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SAVE_COP2_REGISTER(COP2_HSH_DATW11)
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SAVE_COP2_REGISTER(COP2_HSH_DATW12)
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SAVE_COP2_REGISTER(COP2_HSH_DATW13)
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SAVE_COP2_REGISTER(COP2_HSH_DATW14)
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SAVE_COP2_REGISTER(COP2_HSH_IVW0)
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SAVE_COP2_REGISTER(COP2_HSH_IVW1)
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SAVE_COP2_REGISTER(COP2_HSH_IVW2)
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SAVE_COP2_REGISTER(COP2_HSH_IVW3)
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SAVE_COP2_REGISTER(COP2_HSH_IVW4)
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SAVE_COP2_REGISTER(COP2_HSH_IVW5)
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SAVE_COP2_REGISTER(COP2_HSH_IVW6)
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SAVE_COP2_REGISTER(COP2_HSH_IVW7)
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SAVE_COP2_REGISTER(COP2_GFM_MULT0)
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SAVE_COP2_REGISTER(COP2_GFM_MULT1)
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SAVE_COP2_REGISTER(COP2_GFM_POLY)
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SAVE_COP2_REGISTER(COP2_GFM_RESULT0)
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SAVE_COP2_REGISTER(COP2_GFM_RESULT1)
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jr ra
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nop
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save_pass1:
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SAVE_COP2_REGISTER(COP2_HSH_DATW0_PASS1)
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SAVE_COP2_REGISTER(COP2_HSH_DATW1_PASS1)
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SAVE_COP2_REGISTER(COP2_HSH_DATW2_PASS1)
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SAVE_COP2_REGISTER(COP2_HSH_DATW3_PASS1)
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SAVE_COP2_REGISTER(COP2_HSH_DATW4_PASS1)
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SAVE_COP2_REGISTER(COP2_HSH_DATW5_PASS1)
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SAVE_COP2_REGISTER(COP2_HSH_DATW6_PASS1)
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SAVE_COP2_REGISTER(COP2_HSH_IVW0_PASS1)
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SAVE_COP2_REGISTER(COP2_HSH_IVW1_PASS1)
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SAVE_COP2_REGISTER(COP2_HSH_IVW2_PASS1)
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save_done:
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jr ra
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nop
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END(octeon_cop2_save)
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LEAF(octeon_cop2_restore)
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/* Get CvmCtl register */
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dmfc0 t0, $9, 7
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/* CRC state */
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RESTORE_COP2_REGISTER(COP2_CRC_IV)
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RESTORE_COP2_REGISTER(COP2_CRC_LENGTH)
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RESTORE_COP2_REGISTER(COP2_CRC_POLY)
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/* if CvmCtl[NODFA_CP2] -> save_nodfa */
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bbit1 t0, 28, restore_nodfa
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nop
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/* LLM state */
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RESTORE_COP2_REGISTER(COP2_LLM_DAT0)
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RESTORE_COP2_REGISTER(COP2_LLM_DAT1)
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restore_nodfa:
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/* crypto stuff is irrelevant if CvmCtl[NOCRYPTO] */
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bbit1 t0, 26, restore_done
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nop
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RESTORE_COP2_REGISTER(COP2_3DES_IV)
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RESTORE_COP2_REGISTER(COP2_3DES_KEY0)
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RESTORE_COP2_REGISTER(COP2_3DES_KEY1)
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RESTORE_COP2_REGISTER(COP2_3DES_KEY2)
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RESTORE_COP2_REGISTER(COP2_3DES_RESULT)
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RESTORE_COP2_REGISTER(COP2_AES_INP0)
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RESTORE_COP2_REGISTER(COP2_AES_IV0)
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RESTORE_COP2_REGISTER(COP2_AES_IV1)
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RESTORE_COP2_REGISTER(COP2_AES_KEY0)
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RESTORE_COP2_REGISTER(COP2_AES_KEY1)
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RESTORE_COP2_REGISTER(COP2_AES_KEY2)
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RESTORE_COP2_REGISTER(COP2_AES_KEY3)
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RESTORE_COP2_REGISTER(COP2_AES_KEYLEN)
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RESTORE_COP2_REGISTER(COP2_AES_RESULT0)
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RESTORE_COP2_REGISTER(COP2_AES_RESULT1)
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dmfc0 t0, $15
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li t1, 0x000d0000 /* Octeon Pass1 */
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beq t0, t1, restore_pass1
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nop
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RESTORE_COP2_REGISTER(COP2_HSH_DATW0)
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RESTORE_COP2_REGISTER(COP2_HSH_DATW1)
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RESTORE_COP2_REGISTER(COP2_HSH_DATW2)
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RESTORE_COP2_REGISTER(COP2_HSH_DATW3)
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RESTORE_COP2_REGISTER(COP2_HSH_DATW4)
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RESTORE_COP2_REGISTER(COP2_HSH_DATW5)
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RESTORE_COP2_REGISTER(COP2_HSH_DATW6)
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RESTORE_COP2_REGISTER(COP2_HSH_DATW7)
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RESTORE_COP2_REGISTER(COP2_HSH_DATW8)
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RESTORE_COP2_REGISTER(COP2_HSH_DATW9)
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RESTORE_COP2_REGISTER(COP2_HSH_DATW10)
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RESTORE_COP2_REGISTER(COP2_HSH_DATW11)
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RESTORE_COP2_REGISTER(COP2_HSH_DATW12)
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RESTORE_COP2_REGISTER(COP2_HSH_DATW13)
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RESTORE_COP2_REGISTER(COP2_HSH_DATW14)
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RESTORE_COP2_REGISTER(COP2_HSH_IVW0)
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RESTORE_COP2_REGISTER(COP2_HSH_IVW1)
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RESTORE_COP2_REGISTER(COP2_HSH_IVW2)
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RESTORE_COP2_REGISTER(COP2_HSH_IVW3)
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RESTORE_COP2_REGISTER(COP2_HSH_IVW4)
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RESTORE_COP2_REGISTER(COP2_HSH_IVW5)
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RESTORE_COP2_REGISTER(COP2_HSH_IVW6)
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RESTORE_COP2_REGISTER(COP2_HSH_IVW7)
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RESTORE_COP2_REGISTER(COP2_GFM_MULT0)
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RESTORE_COP2_REGISTER(COP2_GFM_MULT1)
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RESTORE_COP2_REGISTER(COP2_GFM_POLY)
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RESTORE_COP2_REGISTER(COP2_GFM_RESULT0)
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RESTORE_COP2_REGISTER(COP2_GFM_RESULT1)
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jr ra
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nop
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restore_pass1:
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RESTORE_COP2_REGISTER(COP2_HSH_DATW0_PASS1)
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RESTORE_COP2_REGISTER(COP2_HSH_DATW1_PASS1)
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RESTORE_COP2_REGISTER(COP2_HSH_DATW2_PASS1)
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RESTORE_COP2_REGISTER(COP2_HSH_DATW3_PASS1)
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RESTORE_COP2_REGISTER(COP2_HSH_DATW4_PASS1)
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RESTORE_COP2_REGISTER(COP2_HSH_DATW5_PASS1)
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RESTORE_COP2_REGISTER(COP2_HSH_DATW6_PASS1)
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RESTORE_COP2_REGISTER(COP2_HSH_IVW0_PASS1)
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RESTORE_COP2_REGISTER(COP2_HSH_IVW1_PASS1)
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RESTORE_COP2_REGISTER(COP2_HSH_IVW2_PASS1)
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restore_done:
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jr ra
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nop
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END(octeon_cop2_restore)
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