49bfa624ac
error in the function hypercall_memfree(), where the wrong arena was being passed to kmem_free(). Introduce a per-page flag, VPO_KMEM_EXEC, to mark physical pages that are mapped in kmem with execute permissions. Use this flag to determine which arena the kmem virtual addresses are returned to. Eliminate UMA_SLAB_KRWX. The introduction of VPO_KMEM_EXEC makes it redundant. Update the nearby comment for UMA_SLAB_KERNEL. Reviewed by: kib, markj Discussed with: jeff Approved by: re (marius) Differential Revision: https://reviews.freebsd.org/D16845
576 lines
14 KiB
C
576 lines
14 KiB
C
/*-
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* Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* Ingenic JZ4780 LCD Controller
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <sys/condvar.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/fbio.h>
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#include <vm/vm.h>
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#include <vm/vm_extern.h>
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#include <vm/vm_kern.h>
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#include <vm/pmap.h>
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#include <machine/bus.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/videomode/videomode.h>
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#include <dev/videomode/edidvar.h>
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#include <dev/extres/clk/clk.h>
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#include <mips/ingenic/jz4780_lcd.h>
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#include "fb_if.h"
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#include "hdmi_if.h"
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#define FB_DEFAULT_W 800
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#define FB_DEFAULT_H 600
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#define FB_DEFAULT_REF 60
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#define FB_BPP 32
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#define FB_ALIGN (16 * 4)
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#define FB_MAX_BW (1920 * 1080 * 60)
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#define FB_MAX_W 2048
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#define FB_MAX_H 2048
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#define FB_DIVIDE(x, y) (((x) + ((y) / 2)) / (y))
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#define PCFG_MAGIC 0xc7ff2100
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#define DOT_CLOCK_TO_HZ(c) ((c) * 1000)
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#ifndef VM_MEMATTR_WRITE_COMBINING
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#define VM_MEMATTR_WRITE_COMBINING VM_MEMATTR_UNCACHEABLE
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#endif
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struct jzlcd_softc {
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device_t dev;
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device_t fbdev;
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struct resource *res[1];
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/* Clocks */
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clk_t clk;
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clk_t clk_pix;
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/* Framebuffer */
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struct fb_info info;
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size_t fbsize;
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bus_addr_t paddr;
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vm_offset_t vaddr;
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/* HDMI */
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eventhandler_tag hdmi_evh;
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/* Frame descriptor DMA */
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bus_dma_tag_t fdesc_tag;
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bus_dmamap_t fdesc_map;
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bus_addr_t fdesc_paddr;
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struct lcd_frame_descriptor *fdesc;
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};
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static struct resource_spec jzlcd_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE },
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{ -1, 0 }
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};
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#define LCD_READ(sc, reg) bus_read_4((sc)->res[0], (reg))
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#define LCD_WRITE(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val))
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static int
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jzlcd_allocfb(struct jzlcd_softc *sc)
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{
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sc->vaddr = kmem_alloc_contig(sc->fbsize, M_NOWAIT | M_ZERO, 0, ~0,
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FB_ALIGN, 0, VM_MEMATTR_WRITE_COMBINING);
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if (sc->vaddr == 0) {
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device_printf(sc->dev, "failed to allocate FB memory\n");
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return (ENOMEM);
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}
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sc->paddr = pmap_kextract(sc->vaddr);
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return (0);
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}
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static void
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jzlcd_freefb(struct jzlcd_softc *sc)
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{
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kmem_free(sc->vaddr, sc->fbsize);
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}
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static void
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jzlcd_start(struct jzlcd_softc *sc)
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{
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uint32_t ctrl;
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/* Clear status registers */
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LCD_WRITE(sc, LCDSTATE, 0);
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LCD_WRITE(sc, LCDOSDS, 0);
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/* Enable the controller */
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ctrl = LCD_READ(sc, LCDCTRL);
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ctrl |= LCDCTRL_ENA;
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ctrl &= ~LCDCTRL_DIS;
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LCD_WRITE(sc, LCDCTRL, ctrl);
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}
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static void
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jzlcd_stop(struct jzlcd_softc *sc)
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{
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uint32_t ctrl;
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ctrl = LCD_READ(sc, LCDCTRL);
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if ((ctrl & LCDCTRL_ENA) != 0) {
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/* Disable the controller and wait for it to stop */
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ctrl |= LCDCTRL_DIS;
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LCD_WRITE(sc, LCDCTRL, ctrl);
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while ((LCD_READ(sc, LCDSTATE) & LCDSTATE_LDD) == 0)
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DELAY(100);
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}
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/* Clear all status except for disable */
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LCD_WRITE(sc, LCDSTATE, LCD_READ(sc, LCDSTATE) & ~LCDSTATE_LDD);
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}
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static void
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jzlcd_setup_descriptor(struct jzlcd_softc *sc, const struct videomode *mode,
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u_int desno)
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{
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struct lcd_frame_descriptor *fdesc;
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int line_sz;
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/* Frame size is specified in # words */
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line_sz = (mode->hdisplay * FB_BPP) >> 3;
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line_sz = ((line_sz + 3) & ~3) / 4;
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fdesc = sc->fdesc + desno;
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if (desno == 0)
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fdesc->next = sc->fdesc_paddr +
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sizeof(struct lcd_frame_descriptor);
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else
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fdesc->next = sc->fdesc_paddr;
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fdesc->physaddr = sc->paddr;
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fdesc->id = desno;
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fdesc->cmd = LCDCMD_FRM_EN | (line_sz * mode->vdisplay);
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fdesc->offs = 0;
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fdesc->pw = 0;
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fdesc->cnum_pos = LCDPOS_BPP01_18_24 |
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LCDPOS_PREMULTI01 |
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(desno == 0 ? LCDPOS_COEF_BLE01_1 : LCDPOS_COEF_SLE01);
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fdesc->dessize = LCDDESSIZE_ALPHA |
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((mode->vdisplay - 1) << LCDDESSIZE_HEIGHT_SHIFT) |
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((mode->hdisplay - 1) << LCDDESSIZE_WIDTH_SHIFT);
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}
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static int
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jzlcd_set_videomode(struct jzlcd_softc *sc, const struct videomode *mode)
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{
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u_int hbp, hfp, hsw, vbp, vfp, vsw;
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u_int hds, hde, ht, vds, vde, vt;
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uint32_t ctrl;
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int error;
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hbp = mode->htotal - mode->hsync_end;
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hfp = mode->hsync_start - mode->hdisplay;
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hsw = mode->hsync_end - mode->hsync_start;
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vbp = mode->vtotal - mode->vsync_end;
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vfp = mode->vsync_start - mode->vdisplay;
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vsw = mode->vsync_end - mode->vsync_start;
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hds = hsw + hbp;
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hde = hds + mode->hdisplay;
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ht = hde + hfp;
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vds = vsw + vbp;
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vde = vds + mode->vdisplay;
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vt = vde + vfp;
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/* Setup timings */
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LCD_WRITE(sc, LCDVAT,
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(ht << LCDVAT_HT_SHIFT) | (vt << LCDVAT_VT_SHIFT));
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LCD_WRITE(sc, LCDDAH,
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(hds << LCDDAH_HDS_SHIFT) | (hde << LCDDAH_HDE_SHIFT));
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LCD_WRITE(sc, LCDDAV,
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(vds << LCDDAV_VDS_SHIFT) | (vde << LCDDAV_VDE_SHIFT));
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LCD_WRITE(sc, LCDHSYNC, hsw);
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LCD_WRITE(sc, LCDVSYNC, vsw);
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/* Set configuration */
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LCD_WRITE(sc, LCDCFG, LCDCFG_NEWDES | LCDCFG_RECOVER | LCDCFG_24 |
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LCDCFG_PSM | LCDCFG_CLSM | LCDCFG_SPLM | LCDCFG_REVM | LCDCFG_PCP);
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ctrl = LCD_READ(sc, LCDCTRL);
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ctrl &= ~LCDCTRL_BST;
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ctrl |= LCDCTRL_BST_64 | LCDCTRL_OFUM;
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LCD_WRITE(sc, LCDCTRL, ctrl);
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LCD_WRITE(sc, LCDPCFG, PCFG_MAGIC);
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LCD_WRITE(sc, LCDRGBC, LCDRGBC_RGBFMT);
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/* Update registers */
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LCD_WRITE(sc, LCDSTATE, 0);
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/* Setup frame descriptors */
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jzlcd_setup_descriptor(sc, mode, 0);
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jzlcd_setup_descriptor(sc, mode, 1);
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bus_dmamap_sync(sc->fdesc_tag, sc->fdesc_map, BUS_DMASYNC_PREWRITE);
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/* Setup DMA channels */
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LCD_WRITE(sc, LCDDA0, sc->fdesc_paddr
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+ sizeof(struct lcd_frame_descriptor));
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LCD_WRITE(sc, LCDDA1, sc->fdesc_paddr);
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/* Set display clock */
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error = clk_set_freq(sc->clk_pix, DOT_CLOCK_TO_HZ(mode->dot_clock), 0);
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if (error != 0) {
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device_printf(sc->dev, "failed to set pixel clock to %u Hz\n",
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DOT_CLOCK_TO_HZ(mode->dot_clock));
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return (error);
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}
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return (0);
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}
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static int
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jzlcd_configure(struct jzlcd_softc *sc, const struct videomode *mode)
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{
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size_t fbsize;
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int error;
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fbsize = round_page(mode->hdisplay * mode->vdisplay * (FB_BPP / NBBY));
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/* Detach the old FB device */
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if (sc->fbdev != NULL) {
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device_delete_child(sc->dev, sc->fbdev);
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sc->fbdev = NULL;
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}
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/* If the FB size has changed, free the old FB memory */
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if (sc->fbsize > 0 && sc->fbsize != fbsize) {
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jzlcd_freefb(sc);
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sc->vaddr = 0;
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}
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/* Allocate the FB if necessary */
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sc->fbsize = fbsize;
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if (sc->vaddr == 0) {
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error = jzlcd_allocfb(sc);
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if (error != 0) {
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device_printf(sc->dev, "failed to allocate FB memory\n");
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return (ENXIO);
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}
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}
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/* Setup video mode */
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error = jzlcd_set_videomode(sc, mode);
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if (error != 0)
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return (error);
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/* Attach framebuffer device */
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sc->info.fb_name = device_get_nameunit(sc->dev);
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sc->info.fb_vbase = (intptr_t)sc->vaddr;
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sc->info.fb_pbase = sc->paddr;
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sc->info.fb_size = sc->fbsize;
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sc->info.fb_bpp = sc->info.fb_depth = FB_BPP;
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sc->info.fb_stride = mode->hdisplay * (FB_BPP / NBBY);
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sc->info.fb_width = mode->hdisplay;
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sc->info.fb_height = mode->vdisplay;
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#ifdef VM_MEMATTR_WRITE_COMBINING
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sc->info.fb_flags = FB_FLAG_MEMATTR;
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sc->info.fb_memattr = VM_MEMATTR_WRITE_COMBINING;
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#endif
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sc->fbdev = device_add_child(sc->dev, "fbd", device_get_unit(sc->dev));
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if (sc->fbdev == NULL) {
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device_printf(sc->dev, "failed to add fbd child\n");
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return (ENOENT);
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}
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error = device_probe_and_attach(sc->fbdev);
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if (error != 0) {
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device_printf(sc->dev, "failed to attach fbd device\n");
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return (error);
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}
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return (0);
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}
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static int
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jzlcd_get_bandwidth(const struct videomode *mode)
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{
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int refresh;
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refresh = FB_DIVIDE(FB_DIVIDE(DOT_CLOCK_TO_HZ(mode->dot_clock),
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mode->htotal), mode->vtotal);
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return mode->hdisplay * mode->vdisplay * refresh;
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}
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static int
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jzlcd_mode_supported(const struct videomode *mode)
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{
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/* Width and height must be less than 2048 */
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if (mode->hdisplay > FB_MAX_W || mode->vdisplay > FB_MAX_H)
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return (0);
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/* Bandwidth check */
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if (jzlcd_get_bandwidth(mode) > FB_MAX_BW)
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return (0);
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/* Interlace modes not yet supported by the driver */
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if ((mode->flags & VID_INTERLACE) != 0)
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return (0);
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return (1);
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}
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static const struct videomode *
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jzlcd_find_mode(struct edid_info *ei)
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{
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const struct videomode *best;
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int n, bw, best_bw;
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/* If the preferred mode is OK, just use it */
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if (jzlcd_mode_supported(ei->edid_preferred_mode) != 0)
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return ei->edid_preferred_mode;
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/* Pick the mode with the highest bandwidth requirements */
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best = NULL;
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best_bw = 0;
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for (n = 0; n < ei->edid_nmodes; n++) {
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if (jzlcd_mode_supported(&ei->edid_modes[n]) == 0)
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continue;
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bw = jzlcd_get_bandwidth(&ei->edid_modes[n]);
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if (bw > FB_MAX_BW)
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continue;
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if (best == NULL || bw > best_bw) {
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best = &ei->edid_modes[n];
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best_bw = bw;
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}
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}
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return best;
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}
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static void
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jzlcd_hdmi_event(void *arg, device_t hdmi_dev)
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{
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const struct videomode *mode;
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struct videomode hdmi_mode;
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struct jzlcd_softc *sc;
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struct edid_info ei;
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uint8_t *edid;
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uint32_t edid_len;
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int error;
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sc = arg;
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edid = NULL;
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edid_len = 0;
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mode = NULL;
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error = HDMI_GET_EDID(hdmi_dev, &edid, &edid_len);
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if (error != 0) {
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device_printf(sc->dev, "failed to get EDID: %d\n", error);
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} else {
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error = edid_parse(edid, &ei);
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if (error != 0) {
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device_printf(sc->dev, "failed to parse EDID: %d\n",
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error);
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} else {
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if (bootverbose)
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edid_print(&ei);
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mode = jzlcd_find_mode(&ei);
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}
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}
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/* If a suitable mode could not be found, try the default */
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if (mode == NULL)
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mode = pick_mode_by_ref(FB_DEFAULT_W, FB_DEFAULT_H,
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FB_DEFAULT_REF);
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if (mode == NULL) {
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device_printf(sc->dev, "failed to find usable video mode\n");
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return;
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}
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if (bootverbose)
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device_printf(sc->dev, "using %dx%d\n",
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mode->hdisplay, mode->vdisplay);
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/* Stop the controller */
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jzlcd_stop(sc);
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/* Configure LCD controller */
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error = jzlcd_configure(sc, mode);
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if (error != 0) {
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device_printf(sc->dev, "failed to configure FB: %d\n", error);
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return;
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}
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/* Enable HDMI TX */
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hdmi_mode = *mode;
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HDMI_SET_VIDEOMODE(hdmi_dev, &hdmi_mode);
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/* Start the controller! */
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jzlcd_start(sc);
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}
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static void
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jzlcd_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
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{
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if (error != 0)
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return;
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*(bus_addr_t *)arg = segs[0].ds_addr;
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}
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static int
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jzlcd_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-lcd"))
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return (ENXIO);
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device_set_desc(dev, "Ingenic JZ4780 LCD Controller");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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jzlcd_attach(device_t dev)
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{
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struct jzlcd_softc *sc;
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int error;
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sc = device_get_softc(dev);
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sc->dev = dev;
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if (bus_alloc_resources(dev, jzlcd_spec, sc->res)) {
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device_printf(dev, "cannot allocate resources for device\n");
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goto failed;
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}
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if (clk_get_by_ofw_name(dev, 0, "lcd_clk", &sc->clk) != 0 ||
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clk_get_by_ofw_name(dev, 0, "lcd_pixclk", &sc->clk_pix) != 0) {
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device_printf(dev, "cannot get clocks\n");
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goto failed;
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}
|
|
if (clk_enable(sc->clk) != 0 || clk_enable(sc->clk_pix) != 0) {
|
|
device_printf(dev, "cannot enable clocks\n");
|
|
goto failed;
|
|
}
|
|
|
|
error = bus_dma_tag_create(
|
|
bus_get_dma_tag(dev),
|
|
sizeof(struct lcd_frame_descriptor), 0,
|
|
BUS_SPACE_MAXADDR_32BIT,
|
|
BUS_SPACE_MAXADDR,
|
|
NULL, NULL,
|
|
sizeof(struct lcd_frame_descriptor) * 2, 1,
|
|
sizeof(struct lcd_frame_descriptor) * 2,
|
|
0,
|
|
NULL, NULL,
|
|
&sc->fdesc_tag);
|
|
if (error != 0) {
|
|
device_printf(dev, "cannot create bus dma tag\n");
|
|
goto failed;
|
|
}
|
|
|
|
error = bus_dmamem_alloc(sc->fdesc_tag, (void **)&sc->fdesc,
|
|
BUS_DMA_NOCACHE | BUS_DMA_WAITOK | BUS_DMA_ZERO, &sc->fdesc_map);
|
|
if (error != 0) {
|
|
device_printf(dev, "cannot allocate dma descriptor\n");
|
|
goto dmaalloc_failed;
|
|
}
|
|
|
|
error = bus_dmamap_load(sc->fdesc_tag, sc->fdesc_map, sc->fdesc,
|
|
sizeof(struct lcd_frame_descriptor) * 2, jzlcd_dmamap_cb,
|
|
&sc->fdesc_paddr, 0);
|
|
if (error != 0) {
|
|
device_printf(dev, "cannot load dma map\n");
|
|
goto dmaload_failed;
|
|
}
|
|
|
|
sc->hdmi_evh = EVENTHANDLER_REGISTER(hdmi_event,
|
|
jzlcd_hdmi_event, sc, 0);
|
|
|
|
return (0);
|
|
|
|
dmaload_failed:
|
|
bus_dmamem_free(sc->fdesc_tag, sc->fdesc, sc->fdesc_map);
|
|
dmaalloc_failed:
|
|
bus_dma_tag_destroy(sc->fdesc_tag);
|
|
failed:
|
|
if (sc->clk_pix != NULL)
|
|
clk_release(sc->clk);
|
|
if (sc->clk != NULL)
|
|
clk_release(sc->clk);
|
|
if (sc->res != NULL)
|
|
bus_release_resources(dev, jzlcd_spec, sc->res);
|
|
|
|
return (ENXIO);
|
|
}
|
|
|
|
static struct fb_info *
|
|
jzlcd_fb_getinfo(device_t dev)
|
|
{
|
|
struct jzlcd_softc *sc;
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
return (&sc->info);
|
|
}
|
|
|
|
static device_method_t jzlcd_methods[] = {
|
|
/* Device interface */
|
|
DEVMETHOD(device_probe, jzlcd_probe),
|
|
DEVMETHOD(device_attach, jzlcd_attach),
|
|
|
|
/* FB interface */
|
|
DEVMETHOD(fb_getinfo, jzlcd_fb_getinfo),
|
|
|
|
DEVMETHOD_END
|
|
};
|
|
|
|
static driver_t jzlcd_driver = {
|
|
"fb",
|
|
jzlcd_methods,
|
|
sizeof(struct jzlcd_softc),
|
|
};
|
|
|
|
static devclass_t jzlcd_devclass;
|
|
|
|
DRIVER_MODULE(fb, simplebus, jzlcd_driver, jzlcd_devclass, 0, 0);
|