255 lines
6.3 KiB
Plaintext
255 lines
6.3 KiB
Plaintext
/*-
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* Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@freebsd.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/ {
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compatible = "rockchip,rk3188";
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&GIC>;
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aliases {
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soc = &SOC;
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};
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SOC: rk3188 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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bus-frequency = <0>;
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GIC: interrupt-controller@1013d000 {
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compatible = "arm,gic";
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reg = <0x1013d000 0x1000>, /* Distributor Registers */
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<0x1013c100 0x0100>; /* CPU Interface Registers */
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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pmu@20004000 {
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compatible = "rockchip,rk30xx-pmu";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x20004000 0x100>;
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};
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grf@20008000 {
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compatible = "rockchip,rk30xx-grf";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = < 0x20008000 0x2000 >;
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};
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mp_tmr@1013c600 {
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compatible = "arm,mpcore-timers";
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#address-cells = <1>;
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#size-cells = <0>;
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clock-frequency = < 148500000 >;
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reg = <0x1013c200 0x100>, /* Global Timer Regs */
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<0x1013c600 0x20>; /* Private Timer Regs */
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interrupts = < 27 29 >;
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interrupt-parent = <&GIC>;
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};
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timer@20038000 {
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compatible = "rockchip,rk30xx-timer";
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reg = <0x20038000 0x20>;
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interrupts = <76>;
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clock-frequency = <24000000>;
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status = "disabled";
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};
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timer@20038020 {
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compatible = "rockchip,rk30xx-timer";
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reg = <0x20038020 0x20>;
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interrupts = <77>;
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clock-frequency = <24000000>;
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status = "disabled";
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};
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timer@20038060 {
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compatible = "rockchip,rk30xx-timer";
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reg = <0x20038060 0x20>;
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interrupts = <91>;
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clock-frequency = <24000000>;
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status = "disabled";
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};
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timer@20038080 {
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compatible = "rockchip,rk30xx-timer";
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reg = <0x20038080 0x20>;
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interrupts = <92>;
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clock-frequency = <24000000>;
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status = "disabled";
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};
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timer@200380a0 {
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compatible = "rockchip,rk30xx-timer";
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reg = <0x200380a0 0x20>;
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interrupts = <96>;
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clock-frequency = <24000000>;
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status = "disabled";
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};
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watchdog@2004c000 {
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compatible = "rockchip,rk30xx-wdt";
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reg = <0x2004c000 0x100>;
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clock-frequency = < 66000000 >;
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};
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gpio0: gpio@2000a000 {
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compatible = "rockchip,rk30xx-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x2000a000 0x100>;
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interrupts = <86>;
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interrupt-parent = <&GIC>;
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};
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gpio1: gpio@2003c000 {
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compatible = "rockchip,rk30xx-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x2003c000 0x100>;
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interrupts = <87>;
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interrupt-parent = <&GIC>;
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};
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gpio2: gpio@2003e000 {
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compatible = "rockchip,rk30xx-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x2003e000 0x100>;
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interrupts = <88>;
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interrupt-parent = <&GIC>;
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};
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gpio3: gpio@20080000 {
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compatible = "rockchip,rk30xx-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x20080000 0x100>;
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interrupts = <89>;
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interrupt-parent = <&GIC>;
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};
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usb0: usb@10180000 {
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compatible = "synopsys,designware-hs-otg2";
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reg = <0x10180000 0x40000>;
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interrupts = <48>;
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interrupt-parent = <&GIC>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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usb1: usb@101c0000 {
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compatible = "synopsys,designware-hs-otg2";
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reg = <0x101c0000 0x40000>;
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interrupts = < 49 >;
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interrupt-parent = <&GIC>;
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#address-cells = <1>;
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#size-cells = <0>;
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gpios = <&gpio0 3 2 2>;
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};
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uart0: serial@10124000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x10124000 0x400>;
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reg-shift = <2>;
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interrupts = <66>;
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interrupt-parent = <&GIC>;
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current-speed = <115200>;
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clock-frequency = < 24000000 >;
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broken-txfifo = <1>;
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status = "disabled";
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};
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uart1: serial@10126000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x10126000 0x400>;
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reg-shift = <2>;
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interrupts = <67>;
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interrupt-parent = <&GIC>;
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current-speed = <115200>;
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clock-frequency = < 24000000 >;
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broken-txfifo = <1>;
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status = "disabled";
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};
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uart2: serial@20064000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x20064000 0x400>;
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reg-shift = <2>;
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interrupts = <68>;
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interrupt-parent = <&GIC>;
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current-speed = <115200>;
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clock-frequency = < 24000000 >;
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broken-txfifo = <1>;
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status = "disabled";
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};
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uart3: serial@20068000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x20068000 0x400>;
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reg-shift = <2>;
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interrupts = <69>;
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interrupt-parent = <&GIC>;
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current-speed = <115200>;
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clock-frequency = < 24000000 >;
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broken-txfifo = <1>;
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status = "disabled";
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};
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mmc@10214000 {
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compatible = "rockchip,rk2928-dw-mshc";
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reg = <0x10214000 0x1000>;
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interrupts = <55>;
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#address-cells = <1>;
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#size-cells = <0>;
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bus-frequency = <48000000>; /* TODO: verify freq */
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fifo-depth = <0x40>;
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num-slots = <1>;
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status = "disabled";
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};
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mmc@10218000 {
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compatible = "rockchip,rk2928-dw-mshc";
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reg = <0x10218000 0x1000>;
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interrupts = <56>;
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#address-cells = <1>;
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#size-cells = <0>;
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bus-frequency = <48000000>; /* TODO: verify freq */
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fifo-depth = <0x40>;
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num-slots = <1>;
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status = "disabled";
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};
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};
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};
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