19d3b47b92
Mainly focus on files that use BSD 2-Clause license, however the tool I was using misidentified many licenses so this was mostly a manual - error prone - task. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts.
371 lines
8.7 KiB
C
371 lines
8.7 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2017 Ruslan Bukin <br@bsdpad.com>
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* Copyright (c) 2013 SRI International
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* All rights reserved.
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*
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* This software was developed by SRI International and the University of
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* Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
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* ("CTSRD"), as part of the DARPA CRASH research programme.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include "opt_platform.h"
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/proc.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#ifdef SMP
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#include <mips/beri/beri_mp.h>
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#endif
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include "pic_if.h"
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#define BP_NUM_HARD_IRQS 5
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#define BP_NUM_IRQS 32
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/* We use hard irqs 15-31 as soft */
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#define BP_FIRST_SOFT 16
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#define BP_CFG_IRQ_S 0
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#define BP_CFG_IRQ_M (0xf << BP_CFG_IRQ_S)
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#define BP_CFG_TID_S 8
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#define BP_CFG_TID_M (0x7FFFFF << BP_CFG_TID_S)
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#define BP_CFG_ENABLE (1 << 31)
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enum {
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BP_CFG,
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BP_IP_READ,
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BP_IP_SET,
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BP_IP_CLEAR
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};
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struct beripic_softc;
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struct beri_pic_isrc {
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struct intr_irqsrc isrc;
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u_int irq;
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uint32_t mips_hard_irq;
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};
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struct hirq {
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uint32_t irq;
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struct beripic_softc *sc;
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};
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struct beripic_softc {
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device_t dev;
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uint32_t nirqs;
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struct beri_pic_isrc irqs[BP_NUM_IRQS];
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struct resource *res[4 + BP_NUM_HARD_IRQS];
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void *ih[BP_NUM_HARD_IRQS];
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struct hirq hirq[BP_NUM_HARD_IRQS];
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uint8_t mips_hard_irq_idx;
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};
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static struct resource_spec beri_pic_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE },
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{ SYS_RES_MEMORY, 1, RF_ACTIVE },
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{ SYS_RES_MEMORY, 2, RF_ACTIVE },
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{ SYS_RES_MEMORY, 3, RF_ACTIVE },
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{ SYS_RES_IRQ, 0, RF_ACTIVE },
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{ SYS_RES_IRQ, 1, RF_ACTIVE },
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{ SYS_RES_IRQ, 2, RF_ACTIVE },
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{ SYS_RES_IRQ, 3, RF_ACTIVE },
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{ SYS_RES_IRQ, 4, RF_ACTIVE },
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{ -1, 0 }
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};
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static int
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beri_pic_intr(void *arg)
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{
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struct beripic_softc *sc;
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struct intr_irqsrc *isrc;
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struct hirq *h;
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uint64_t intr;
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uint64_t reg;
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int i;
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h = arg;
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sc = h->sc;
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intr = bus_read_8(sc->res[BP_IP_READ], 0);
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while ((i = fls(intr)) != 0) {
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i--;
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intr &= ~(1u << i);
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isrc = &sc->irqs[i].isrc;
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reg = bus_read_8(sc->res[BP_CFG], i * 8);
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if ((reg & BP_CFG_IRQ_M) != h->irq) {
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continue;
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}
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if ((reg & (BP_CFG_ENABLE)) == 0) {
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continue;
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}
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if (intr_isrc_dispatch(isrc, curthread->td_intr_frame) != 0) {
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device_printf(sc->dev, "Stray interrupt %u detected\n", i);
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}
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bus_write_8(sc->res[BP_IP_CLEAR], 0, (1 << i));
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}
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return (FILTER_HANDLED);
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}
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static int
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beripic_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "sri-cambridge,beri-pic"))
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return (ENXIO);
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device_set_desc(dev, "BERI Programmable Interrupt Controller");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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beripic_attach(device_t dev)
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{
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struct beripic_softc *sc;
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struct beri_pic_isrc *pic_isrc;
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const char *name;
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struct intr_irqsrc *isrc;
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intptr_t xref;
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uint32_t unit;
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int err;
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int i;
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sc = device_get_softc(dev);
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sc->dev = dev;
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if (bus_alloc_resources(dev, beri_pic_spec, sc->res)) {
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device_printf(dev, "could not allocate resources\n");
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return (ENXIO);
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}
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xref = OF_xref_from_node(ofw_bus_get_node(dev));
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name = device_get_nameunit(dev);
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unit = device_get_unit(dev);
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sc->nirqs = BP_NUM_IRQS;
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for (i = 0; i < sc->nirqs; i++) {
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sc->irqs[i].irq = i;
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isrc = &sc->irqs[i].isrc;
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/* Assign mips hard irq number. */
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pic_isrc = (struct beri_pic_isrc *)isrc;
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pic_isrc->mips_hard_irq = sc->mips_hard_irq_idx++;
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/* Last IRQ is used for IPIs. */
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if (sc->mips_hard_irq_idx >= (BP_NUM_HARD_IRQS - 1)) {
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sc->mips_hard_irq_idx = 0;
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}
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err = intr_isrc_register(isrc, sc->dev,
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0, "pic%d,%d", unit, i);
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bus_write_8(sc->res[BP_CFG], i * 8, 0);
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}
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/*
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* Now, when everything is initialized, it's right time to
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* register interrupt controller to interrupt framefork.
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*/
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if (intr_pic_register(dev, xref) == NULL) {
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device_printf(dev, "could not register PIC\n");
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return (ENXIO);
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}
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/* Last IRQ is used for IPIs. */
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for (i = 0; i < (BP_NUM_HARD_IRQS - 1); i++) {
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sc->hirq[i].sc = sc;
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sc->hirq[i].irq = i;
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if (bus_setup_intr(dev, sc->res[4+i], INTR_TYPE_CLK,
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beri_pic_intr, NULL, &sc->hirq[i], sc->ih[i])) {
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device_printf(dev, "could not setup irq handler\n");
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intr_pic_deregister(dev, xref);
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return (ENXIO);
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}
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}
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return (0);
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}
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static void
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beri_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc)
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{
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struct beri_pic_isrc *pic_isrc;
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struct beripic_softc *sc;
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uint64_t reg;
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sc = device_get_softc(dev);
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pic_isrc = (struct beri_pic_isrc *)isrc;
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reg = BP_CFG_ENABLE;
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reg |= (pic_isrc->mips_hard_irq << BP_CFG_IRQ_S);
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bus_write_8(sc->res[BP_CFG], pic_isrc->irq * 8, reg);
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}
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static void
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beri_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
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{
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struct beri_pic_isrc *pic_isrc;
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struct beripic_softc *sc;
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uint64_t reg;
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sc = device_get_softc(dev);
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pic_isrc = (struct beri_pic_isrc *)isrc;
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reg = bus_read_8(sc->res[BP_CFG], pic_isrc->irq * 8);
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reg &= ~BP_CFG_ENABLE;
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bus_write_8(sc->res[BP_CFG], pic_isrc->irq * 8, reg);
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}
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static int
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beri_pic_map_intr(device_t dev, struct intr_map_data *data,
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struct intr_irqsrc **isrcp)
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{
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struct beripic_softc *sc;
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struct intr_map_data_fdt *daf;
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uint32_t irq;
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sc = device_get_softc(dev);
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daf = (struct intr_map_data_fdt *)data;
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if (data == NULL || data->type != INTR_MAP_DATA_FDT ||
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daf->ncells != 1 || daf->cells[0] >= sc->nirqs)
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return (EINVAL);
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irq = daf->cells[0];
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*isrcp = &sc->irqs[irq].isrc;
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return (0);
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}
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static void
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beri_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
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{
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beri_pic_enable_intr(dev, isrc);
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}
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static void
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beri_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
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{
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beri_pic_disable_intr(dev, isrc);
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}
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#ifdef SMP
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void
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beripic_setup_ipi(device_t dev, u_int tid, u_int ipi_irq)
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{
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struct beripic_softc *sc;
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uint64_t reg;
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sc = device_get_softc(dev);
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reg = (BP_CFG_ENABLE);
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reg |= (ipi_irq << BP_CFG_IRQ_S);
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reg |= (tid << BP_CFG_TID_S);
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bus_write_8(sc->res[BP_CFG], ((BP_FIRST_SOFT + tid) * 8), reg);
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}
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void
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beripic_send_ipi(device_t dev, u_int tid)
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{
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struct beripic_softc *sc;
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uint64_t bit;
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sc = device_get_softc(dev);
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bit = (BP_FIRST_SOFT + tid);
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KASSERT(bit < BP_NUM_IRQS, ("tid (%d) to large\n", tid));
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bus_write_8(sc->res[BP_IP_SET], 0x0, (1 << bit));
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}
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void
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beripic_clear_ipi(device_t dev, u_int tid)
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{
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struct beripic_softc *sc;
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uint64_t bit;
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sc = device_get_softc(dev);
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bit = (BP_FIRST_SOFT + tid);
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KASSERT(bit < BP_NUM_IRQS, ("tid (%d) to large\n", tid));
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bus_write_8(sc->res[BP_IP_CLEAR], 0x0, (1 << bit));
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}
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#endif
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static device_method_t beripic_fdt_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, beripic_probe),
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DEVMETHOD(device_attach, beripic_attach),
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/* Interrupt controller interface */
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DEVMETHOD(pic_enable_intr, beri_pic_enable_intr),
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DEVMETHOD(pic_disable_intr, beri_pic_disable_intr),
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DEVMETHOD(pic_map_intr, beri_pic_map_intr),
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DEVMETHOD(pic_post_ithread, beri_pic_post_ithread),
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DEVMETHOD(pic_pre_ithread, beri_pic_pre_ithread),
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DEVMETHOD_END
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};
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devclass_t beripic_devclass;
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static driver_t beripic_driver = {
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"beripic",
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beripic_fdt_methods,
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sizeof(struct beripic_softc)
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};
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EARLY_DRIVER_MODULE(beripic, ofwbus, beripic_driver, beripic_devclass, 0, 0,
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BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
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