50e24eb628
the cpu dependent files. It will need to be done differently for USIII. - Simplify the logic for detecting context rollovers. Instead of dealing with it when the next context switch would cause the context numbers to rollover, deal with it when they actually do rollover. - Move some things around in cpu_switch so that we only do 1 membar #Sync when switching address space, instead of 2. - Detect kernel threads by comparing the new vm space to vmspace0, instead if checking if the tlb context is 0. - Removed some debug code.
137 lines
5.9 KiB
C
137 lines
5.9 KiB
C
/*
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* Copyright (c) 1996
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* The President and Fellows of Harvard College. All rights reserved.
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This software was developed by the Computer Systems Engineering group
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* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
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* contributed to Berkeley.
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*
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* All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Harvard University.
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* This product includes software developed by the University of
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* California, Lawrence Berkeley Laboratory.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Aaron Brown and
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* Harvard University.
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*-
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* Copyright (c) 2001 by Thomas Moestl <tmm@FreeBSD.org>.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* from: @(#)cache.c 8.2 (Berkeley) 10/30/93
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* from: NetBSD: cache.c,v 1.5 2000/12/06 01:47:50 mrg Exp
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*
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* $FreeBSD$
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <dev/ofw/openfirm.h>
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#include <machine/cache.h>
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#include <machine/tlb.h>
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#include <machine/ver.h>
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struct cacheinfo cache;
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dcache_page_inval_t *dcache_page_inval;
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icache_page_inval_t *icache_page_inval;
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#define OF_GET(h, n, v) OF_getprop((h), (n), &(v), sizeof(v))
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/*
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* Fill in the cache parameters using the cpu node.
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*/
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void
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cache_init(phandle_t node)
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{
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u_long set;
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if (OF_GET(node, "icache-size", cache.ic_size) == -1 ||
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OF_GET(node, "icache-line-size", cache.ic_linesize) == -1 ||
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OF_GET(node, "icache-associativity", cache.ic_assoc) == -1 ||
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OF_GET(node, "dcache-size", cache.dc_size) == -1 ||
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OF_GET(node, "dcache-line-size", cache.dc_linesize) == -1 ||
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OF_GET(node, "dcache-associativity", cache.dc_assoc) == -1 ||
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OF_GET(node, "ecache-size", cache.ec_size) == -1 ||
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OF_GET(node, "ecache-line-size", cache.ec_linesize) == -1 ||
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OF_GET(node, "ecache-associativity", cache.ec_assoc) == -1)
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panic("cache_init: could not retrieve cache parameters");
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cache.ic_set = cache.ic_size / cache.ic_assoc;
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cache.ic_l2set = ffs(cache.ic_set) - 1;
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if ((cache.ic_set & ~(1UL << cache.ic_l2set)) != 0)
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panic("cache_init: I$ set size not a power of 2");
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cache.dc_l2size = ffs(cache.dc_size) - 1;
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if ((cache.dc_size & ~(1UL << cache.dc_l2size)) != 0)
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panic("cache_init: D$ size not a power of 2");
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if (((cache.dc_size / cache.dc_assoc) / PAGE_SIZE) != DCACHE_COLORS)
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panic("cache_init: too many D$ colors");
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set = cache.ec_size / cache.ec_assoc;
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cache.ec_l2set = ffs(set) - 1;
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if ((set & ~(1UL << cache.ec_l2set)) != 0)
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panic("cache_init: E$ set size not a power of 2");
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if (cpu_impl >= CPU_IMPL_ULTRASPARCIII) {
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dcache_page_inval = cheetah_dcache_page_inval;
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icache_page_inval = cheetah_icache_page_inval;
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tlb_flush_user = cheetah_tlb_flush_user;
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} else {
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dcache_page_inval = spitfire_dcache_page_inval;
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icache_page_inval = spitfire_icache_page_inval;
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tlb_flush_user = spitfire_tlb_flush_user;
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}
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}
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