285 lines
7.3 KiB
C
285 lines
7.3 KiB
C
/*-
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* Copyright (c) 2009 Neelkanth Natu
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include <sys/types.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/pcpu.h>
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#include <sys/smp.h>
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#include <vm/vm.h>
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#include <vm/vm_param.h>
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#include <vm/vm_kern.h>
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#include <vm/vm_extern.h>
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#include <vm/pmap.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcib_private.h>
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#include <machine/pmap.h>
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#include <machine/resource.h>
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#include "pcib_if.h"
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#include "sb_scd.h"
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__FBSDID("$FreeBSD$");
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static struct {
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vm_offset_t vaddr;
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vm_paddr_t paddr;
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} zbpci_config_space[MAXCPU];
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static const vm_paddr_t CFG_PADDR_BASE = 0xFE000000;
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static int
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zbpci_probe(device_t dev)
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{
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device_set_desc(dev, "Broadcom/Sibyte PCI I/O Bridge");
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return (0);
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}
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static int
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zbpci_attach(device_t dev)
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{
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int n, rid, size;
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vm_offset_t va;
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struct resource *res;
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/*
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* Reserve the the physical memory that is used to read/write to the
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* pci config space but don't activate it. We are using a page worth
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* of KVA as a window over this region.
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*/
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rid = 0;
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size = (PCI_BUSMAX + 1) * (PCI_SLOTMAX + 1) * (PCI_FUNCMAX + 1) * 256;
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res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, CFG_PADDR_BASE,
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CFG_PADDR_BASE + size - 1, size, 0);
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if (res == NULL) {
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panic("Cannot allocate resource for config space accesses.");
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}
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/*
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* Allocate KVA for accessing PCI config space.
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*/
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va = kmem_alloc_nofault(kernel_map, PAGE_SIZE * mp_ncpus);
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if (va == 0) {
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device_printf(dev, "Cannot allocate virtual addresses for "
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"config space access.\n");
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return (ENOMEM);
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}
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for (n = 0; n < mp_ncpus; ++n) {
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zbpci_config_space[n].vaddr = va + n * PAGE_SIZE;
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}
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/*
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* Sibyte has the PCI bus hierarchy rooted at bus 0 and HT-PCI
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* hierarchy rooted at bus 1.
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*/
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if (device_add_child(dev, "pci", 0) == NULL) {
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panic("zbpci_attach: could not add pci bus 0.\n");
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}
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if (device_add_child(dev, "pci", 1) == NULL) {
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panic("zbpci_attach: could not add pci bus 1.\n");
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}
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if (bootverbose) {
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device_printf(dev, "attached.\n");
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}
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return (bus_generic_attach(dev));
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}
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static int
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zbpci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
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{
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switch (which) {
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case PCIB_IVAR_DOMAIN:
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*result = 0; /* single PCI domain */
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return (0);
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case PCIB_IVAR_BUS:
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*result = device_get_unit(child); /* PCI bus 0 or 1 */
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return (0);
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default:
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return (ENOENT);
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}
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}
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/*
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* We rely on the CFE to have configured the intline correctly to point to
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* one of PCI-A/PCI-B/PCI-C/PCI-D in the interupt mapper.
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*/
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static int
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zbpci_route_interrupt(device_t pcib, device_t dev, int pin)
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{
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return (PCI_INVALID_IRQ);
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}
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/*
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* This function is expected to be called in a critical section since it
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* changes the per-cpu pci config space va-to-pa mappings.
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*/
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static vm_offset_t
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zbpci_config_space_va(int bus, int slot, int func, int reg, int bytes)
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{
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int cpu;
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vm_offset_t va_page;
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vm_paddr_t pa, pa_page;
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if (bus <= PCI_BUSMAX && slot <= PCI_SLOTMAX && func <= PCI_FUNCMAX &&
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reg <= PCI_REGMAX && (bytes == 1 || bytes == 2 || bytes == 4) &&
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((reg & (bytes - 1)) == 0)) {
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cpu = PCPU_GET(cpuid);
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va_page = zbpci_config_space[cpu].vaddr;
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pa = CFG_PADDR_BASE |
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(bus << 16) | (slot << 11) | (func << 8) | reg;
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pa_page = pa & ~(PAGE_SIZE - 1);
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if (zbpci_config_space[cpu].paddr != pa_page) {
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pmap_kremove(va_page);
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pmap_kenter(va_page, pa_page);
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zbpci_config_space[cpu].paddr = pa_page;
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}
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return (va_page + (pa - pa_page));
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} else {
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return (0);
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}
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}
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static uint32_t
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zbpci_read_config(device_t dev, u_int b, u_int s, u_int f, u_int r, int w)
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{
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uint32_t data;
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vm_offset_t va;
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critical_enter();
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va = zbpci_config_space_va(b, s, f, r, w);
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if (va == 0) {
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panic("zbpci_read_config: invalid %d/%d/%d[%d] %d\n",
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b, s, f, r, w);
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}
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switch (w) {
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case 4:
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data = *(uint32_t *)va;
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break;
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case 2:
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data = *(uint16_t *)va;
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break;
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case 1:
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data = *(uint8_t *)va;
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break;
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default:
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panic("zbpci_read_config: invalid width %d\n", w);
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}
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critical_exit();
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return (data);
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}
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static void
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zbpci_write_config(device_t d, u_int b, u_int s, u_int f, u_int r,
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uint32_t data, int w)
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{
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vm_offset_t va;
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critical_enter();
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va = zbpci_config_space_va(b, s, f, r, w);
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if (va == 0) {
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panic("zbpci_write_config: invalid %d/%d/%d[%d] %d/%d\n",
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b, s, f, r, data, w);
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}
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switch (w) {
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case 4:
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*(uint32_t *)va = data;
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break;
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case 2:
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*(uint16_t *)va = data;
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break;
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case 1:
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*(uint8_t *)va = data;
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break;
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default:
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panic("zbpci_write_config: invalid width %d\n", w);
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}
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critical_exit();
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}
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static device_method_t zbpci_methods[] ={
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/* Device interface */
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DEVMETHOD(device_probe, zbpci_probe),
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DEVMETHOD(device_attach, zbpci_attach),
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DEVMETHOD(device_detach, bus_generic_detach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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DEVMETHOD(device_resume, bus_generic_resume),
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/* Bus interface */
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DEVMETHOD(bus_read_ivar, zbpci_read_ivar),
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DEVMETHOD(bus_write_ivar, bus_generic_write_ivar),
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DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
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DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
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DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
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DEVMETHOD(bus_release_resource, bus_generic_release_resource),
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DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
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DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
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DEVMETHOD(bus_add_child, bus_generic_add_child),
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/* pcib interface */
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DEVMETHOD(pcib_maxslots, pcib_maxslots),
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DEVMETHOD(pcib_read_config, zbpci_read_config),
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DEVMETHOD(pcib_write_config, zbpci_write_config),
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DEVMETHOD(pcib_route_interrupt, zbpci_route_interrupt),
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{ 0, 0 }
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};
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/*
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* The "zbpci" class inherits from the "pcib" base class. Therefore in
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* addition to drivers that belong to the "zbpci" class we will also
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* consider drivers belonging to the "pcib" when probing children of
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* "zbpci".
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*/
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DECLARE_CLASS(pcib_driver);
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DEFINE_CLASS_1(zbpci, zbpci_driver, zbpci_methods, 0, pcib_driver);
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static devclass_t zbpci_devclass;
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DRIVER_MODULE(zbpci, zbbus, zbpci_driver, zbpci_devclass, 0, 0);
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