92 lines
3.4 KiB
C
92 lines
3.4 KiB
C
/*-
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* Copyright (c) 2012 Adrian Chadd <adrian@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* Atheros AR933x SoC UART registers
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*/
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#ifndef __AR933X_UART_H__
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#define __AR933X_UART_H__
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#define AR933X_UART_REGS_SIZE 20
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#define AR933X_UART_FIFO_SIZE 16
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#define AR933X_UART_DATA_REG 0x00
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#define AR933X_UART_CS_REG 0x04
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#define AR933X_UART_CLOCK_REG 0x08
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#define AR933X_UART_INT_REG 0x0c
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#define AR933X_UART_INT_EN_REG 0x10
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#define AR933X_UART_DATA_TX_RX_MASK 0xff
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#define AR933X_UART_DATA_RX_CSR (1 << 8)
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#define AR933X_UART_DATA_TX_CSR (1 << 9)
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#define AR933X_UART_CS_PARITY_S 0
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#define AR933X_UART_CS_PARITY_M 0x3
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#define AR933X_UART_CS_PARITY_NONE 0
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#define AR933X_UART_CS_PARITY_ODD 1
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#define AR933X_UART_CS_PARITY_EVEN 2
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#define AR933X_UART_CS_IF_MODE_S 2
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#define AR933X_UART_CS_IF_MODE_M 0x3
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#define AR933X_UART_CS_IF_MODE_NONE 0
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#define AR933X_UART_CS_IF_MODE_DTE 1
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#define AR933X_UART_CS_IF_MODE_DCE 2
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#define AR933X_UART_CS_FLOW_CTRL_S 4
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#define AR933X_UART_CS_FLOW_CTRL_M 0x3
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#define AR933X_UART_CS_DMA_EN (1 << 6)
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#define AR933X_UART_CS_TX_READY_ORIDE (1 << 7)
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#define AR933X_UART_CS_RX_READY_ORIDE (1 << 8)
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#define AR933X_UART_CS_TX_READY (1 << 9)
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#define AR933X_UART_CS_RX_BREAK (1 << 10)
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#define AR933X_UART_CS_TX_BREAK (1 << 11)
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#define AR933X_UART_CS_HOST_INT (1 << 12)
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#define AR933X_UART_CS_HOST_INT_EN (1 << 13)
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#define AR933X_UART_CS_TX_BUSY (1 << 14)
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#define AR933X_UART_CS_RX_BUSY (1 << 15)
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#define AR933X_UART_CLOCK_SCALE_M 0xff
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#define AR933X_UART_CLOCK_SCALE_S 16
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#define AR933X_UART_CLOCK_STEP_M 0xffff
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#define AR933X_UART_CLOCK_STEP_S 0
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#define AR933X_UART_MAX_SCALE 0xff
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#define AR933X_UART_MAX_STEP 0xffff
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#define AR933X_UART_INT_RX_VALID (1 << 0)
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#define AR933X_UART_INT_TX_READY (1 << 1)
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#define AR933X_UART_INT_RX_FRAMING_ERR (1 << 2)
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#define AR933X_UART_INT_RX_OFLOW_ERR (1 << 3)
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#define AR933X_UART_INT_TX_OFLOW_ERR (1 << 4)
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#define AR933X_UART_INT_RX_PARITY_ERR (1 << 5)
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#define AR933X_UART_INT_RX_BREAK_ON (1 << 6)
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#define AR933X_UART_INT_RX_BREAK_OFF (1 << 7)
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#define AR933X_UART_INT_RX_FULL (1 << 8)
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#define AR933X_UART_INT_TX_EMPTY (1 << 9)
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#define AR933X_UART_INT_ALLINTS 0x3ff
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#endif /* __AR933X_UART_H__ */
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