7a58bf0443
Enabling HvCallSetVpRegisters and HvCallGetVpRegisters for hypercalls to read and write to specific MSRs. This is required for implementing wrmsr and rdmsr, which is required for Hyper-V vmbus driver for ARM64. Also we need to use arm smccc hvc 1.2 version as we need to access registers beyond X0-X3 for HvCallGetVpRegisters. Currently scoping it only for Hyper-V. Reviewed by: lwhsu, andrew, whu Tested by: Souradeep Chakrabarti <schakrabarti@microsoft.com> Signed-off-by: Souradeep Chakrabarti <schakrabarti@microsoft.com> Sponsored by: Microsoft Differential Revision: https://reviews.freebsd.org/D36256
89 lines
2.9 KiB
ArmAsm
89 lines
2.9 KiB
ArmAsm
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Ruslan Bukin <br@bsdpad.com>
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*
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* This software was developed by SRI International and the University of
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* Cambridge Computer Laboratory (Department of Computer Science and
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* Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
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* DARPA SSITH research programme.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <machine/asm.h>
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__FBSDID("$FreeBSD$");
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.macro arm_smccc_1_0 insn
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ENTRY(arm_smccc_\insn)
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\insn #0
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ldr x4, [sp]
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cbz x4, 1f
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stp x0, x1, [x4, #16 * 0]
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stp x2, x3, [x4, #16 * 1]
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1: ret
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END(arm_smccc_\insn)
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.endm
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/*
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* int arm_smccc_*(register_t, register_t, register_t, register_t,
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* register_t, register_t, register_t, register_t,
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* struct arm_smccc_res *res)
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*/
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arm_smccc_1_0 hvc
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arm_smccc_1_0 smc
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.macro arm_smccc_1_2 insn
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ENTRY(arm_smccc_1_2_\insn)
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stp x1, x19, [sp, #-16]!
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mov x19, x0
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ldp x0, x1, [x19, #16 * 0]
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ldp x2, x3, [x19, #16 * 1]
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ldp x4, x5, [x19, #16 * 2]
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ldp x6, x7, [x19, #16 * 3]
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ldp x8, x9, [x19, #16 * 4]
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ldp x10, x11, [x19, #16 * 5]
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ldp x12, x13, [x19, #16 * 6]
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ldp x14, x15, [x19, #16 * 7]
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ldp x16, x17, [x19, #16 * 8]
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\insn #0
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ldr x19, [sp]
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cbz x19, 1f
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stp x0, x1, [x19, #16 * 0]
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stp x2, x3, [x19, #16 * 1]
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stp x4, x5, [x19, #16 * 2]
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stp x6, x7, [x19, #16 * 3]
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stp x8, x9, [x19, #16 * 4]
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stp x10, x11, [x19, #16 * 5]
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stp x12, x13, [x19, #16 * 6]
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stp x14, x15, [x19, #16 * 7]
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stp x16, x17, [x19, #16 * 8]
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ldp xzr, x19, [sp], #16
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1: ret
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END(arm_smccc_1_2\insn)
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.endm
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/* int arm_smccc_1_2_*(const struct arm_smccc_1_2_regs *args,
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* struct arm_smccc_1_2_regs *res)
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*/
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arm_smccc_1_2 hvc
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arm_smccc_1_2 smc
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