824fc46089
support for AVX on i386. - Similar to amd64, move the FPU save area out of the PCB and instead store saved FPU state in a variable-sized buffer after the PCB on the stack. - To support the variable PCB location, alter the locore code to only use the bottom-most page of proc0stack for init386(). init386() returns the correct stack pointer to locore which adjusts the stack for thread0 before calling mi_startup(). - Don't bother setting cr3 in thread0's pcb in locore before calling init386(). It wasn't used (init386() overwrote it at the end) and it doesn't work with the variable-sized FPU save area. - Remove the new-bus attachment from npx. This was only ever useful for external co-processors using IRQ13, but those have not been supported for several years. npxinit() is now called much earlier during boot (init386()) similar to amd64. - Implement PT_{GET,SET}XSTATE and I386_GET_XFPUSTATE. - npxsave() is now only called from context switch contexts so it can use XSAVEOPT. Differential Revision: https://reviews.freebsd.org/D1058 Reviewed by: kib Tested on: FreeBSD/i386 VM under bhyve on Intel i5-2520
409 lines
11 KiB
C
409 lines
11 KiB
C
/*-
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* Copyright (c) 2001 Takanori Watanabe <takawata@jp.freebsd.org>
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* Copyright (c) 2001-2012 Mitsuru IWASAKI <iwasaki@jp.freebsd.org>
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* Copyright (c) 2003 Peter Wemm
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* Copyright (c) 2008-2012 Jung-uk Kim <jkim@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#ifdef __i386__
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#include "opt_npx.h"
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#endif
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/eventhandler.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/memrange.h>
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#include <sys/smp.h>
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#include <sys/systm.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <machine/clock.h>
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#include <machine/cpu.h>
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#include <machine/intr_machdep.h>
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#include <x86/mca.h>
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#include <machine/pcb.h>
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#include <machine/pmap.h>
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#include <machine/specialreg.h>
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#include <machine/md_var.h>
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#ifdef SMP
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#include <x86/apicreg.h>
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#include <machine/smp.h>
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#include <machine/vmparam.h>
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#endif
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#include <contrib/dev/acpica/include/acpi.h>
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#include <dev/acpica/acpivar.h>
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#include "acpi_wakecode.h"
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#include "acpi_wakedata.h"
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/* Make sure the code is less than a page and leave room for the stack. */
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CTASSERT(sizeof(wakecode) < PAGE_SIZE - 1024);
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extern int acpi_resume_beep;
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extern int acpi_reset_video;
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#ifdef SMP
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extern struct susppcb **susppcbs;
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static cpuset_t suspcpus;
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#else
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static struct susppcb **susppcbs;
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#endif
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static void *acpi_alloc_wakeup_handler(void);
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static void acpi_stop_beep(void *);
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#ifdef SMP
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static int acpi_wakeup_ap(struct acpi_softc *, int);
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static void acpi_wakeup_cpus(struct acpi_softc *);
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#endif
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#ifdef __amd64__
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#define ACPI_PAGETABLES 3
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#else
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#define ACPI_PAGETABLES 0
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#endif
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#define WAKECODE_VADDR(sc) \
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((sc)->acpi_wakeaddr + (ACPI_PAGETABLES * PAGE_SIZE))
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#define WAKECODE_PADDR(sc) \
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((sc)->acpi_wakephys + (ACPI_PAGETABLES * PAGE_SIZE))
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#define WAKECODE_FIXUP(offset, type, val) do { \
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type *addr; \
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addr = (type *)(WAKECODE_VADDR(sc) + offset); \
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*addr = val; \
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} while (0)
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static void
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acpi_stop_beep(void *arg)
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{
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if (acpi_resume_beep != 0)
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timer_spkr_release();
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}
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#ifdef SMP
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static int
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acpi_wakeup_ap(struct acpi_softc *sc, int cpu)
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{
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struct pcb *pcb;
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int vector = (WAKECODE_PADDR(sc) >> 12) & 0xff;
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int apic_id = cpu_apic_ids[cpu];
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int ms;
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pcb = &susppcbs[cpu]->sp_pcb;
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WAKECODE_FIXUP(wakeup_pcb, struct pcb *, pcb);
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WAKECODE_FIXUP(wakeup_gdt, uint16_t, pcb->pcb_gdt.rd_limit);
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WAKECODE_FIXUP(wakeup_gdt + 2, uint64_t, pcb->pcb_gdt.rd_base);
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ipi_startup(apic_id, vector);
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/* Wait up to 5 seconds for it to resume. */
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for (ms = 0; ms < 5000; ms++) {
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if (!CPU_ISSET(cpu, &suspended_cpus))
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return (1); /* return SUCCESS */
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DELAY(1000);
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}
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return (0); /* return FAILURE */
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}
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#define WARMBOOT_TARGET 0
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#define WARMBOOT_OFF (KERNBASE + 0x0467)
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#define WARMBOOT_SEG (KERNBASE + 0x0469)
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#define CMOS_REG (0x70)
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#define CMOS_DATA (0x71)
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#define BIOS_RESET (0x0f)
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#define BIOS_WARM (0x0a)
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static void
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acpi_wakeup_cpus(struct acpi_softc *sc)
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{
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uint32_t mpbioswarmvec;
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int cpu;
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u_char mpbiosreason;
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/* save the current value of the warm-start vector */
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mpbioswarmvec = *((uint32_t *)WARMBOOT_OFF);
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outb(CMOS_REG, BIOS_RESET);
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mpbiosreason = inb(CMOS_DATA);
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/* setup a vector to our boot code */
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*((volatile u_short *)WARMBOOT_OFF) = WARMBOOT_TARGET;
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*((volatile u_short *)WARMBOOT_SEG) = WAKECODE_PADDR(sc) >> 4;
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outb(CMOS_REG, BIOS_RESET);
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outb(CMOS_DATA, BIOS_WARM); /* 'warm-start' */
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/* Wake up each AP. */
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for (cpu = 1; cpu < mp_ncpus; cpu++) {
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if (!CPU_ISSET(cpu, &suspcpus))
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continue;
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if (acpi_wakeup_ap(sc, cpu) == 0) {
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/* restore the warmstart vector */
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*(uint32_t *)WARMBOOT_OFF = mpbioswarmvec;
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panic("acpi_wakeup: failed to resume AP #%d (PHY #%d)",
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cpu, cpu_apic_ids[cpu]);
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}
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}
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/* restore the warmstart vector */
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*(uint32_t *)WARMBOOT_OFF = mpbioswarmvec;
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outb(CMOS_REG, BIOS_RESET);
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outb(CMOS_DATA, mpbiosreason);
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}
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#endif
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int
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acpi_sleep_machdep(struct acpi_softc *sc, int state)
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{
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ACPI_STATUS status;
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struct pcb *pcb;
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if (sc->acpi_wakeaddr == 0ul)
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return (-1); /* couldn't alloc wake memory */
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#ifdef SMP
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suspcpus = all_cpus;
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CPU_CLR(PCPU_GET(cpuid), &suspcpus);
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#endif
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if (acpi_resume_beep != 0)
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timer_spkr_acquire();
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AcpiSetFirmwareWakingVector(WAKECODE_PADDR(sc));
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intr_suspend();
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pcb = &susppcbs[0]->sp_pcb;
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if (savectx(pcb)) {
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#ifdef __amd64__
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fpususpend(susppcbs[0]->sp_fpususpend);
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#elif defined(DEV_NPX)
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npxsuspend(susppcbs[0]->sp_fpususpend);
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#endif
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#ifdef SMP
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if (!CPU_EMPTY(&suspcpus) && suspend_cpus(suspcpus) == 0) {
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device_printf(sc->acpi_dev, "Failed to suspend APs\n");
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return (0); /* couldn't sleep */
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}
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#endif
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WAKECODE_FIXUP(resume_beep, uint8_t, (acpi_resume_beep != 0));
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WAKECODE_FIXUP(reset_video, uint8_t, (acpi_reset_video != 0));
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#ifndef __amd64__
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WAKECODE_FIXUP(wakeup_cr4, register_t, pcb->pcb_cr4);
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#endif
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WAKECODE_FIXUP(wakeup_pcb, struct pcb *, pcb);
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WAKECODE_FIXUP(wakeup_gdt, uint16_t, pcb->pcb_gdt.rd_limit);
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WAKECODE_FIXUP(wakeup_gdt + 2, uint64_t, pcb->pcb_gdt.rd_base);
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/* Call ACPICA to enter the desired sleep state */
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if (state == ACPI_STATE_S4 && sc->acpi_s4bios)
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status = AcpiEnterSleepStateS4bios();
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else
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status = AcpiEnterSleepState(state);
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if (ACPI_FAILURE(status)) {
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device_printf(sc->acpi_dev,
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"AcpiEnterSleepState failed - %s\n",
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AcpiFormatException(status));
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return (0); /* couldn't sleep */
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}
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for (;;)
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ia32_pause();
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} else {
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#ifdef __amd64__
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fpuresume(susppcbs[0]->sp_fpususpend);
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#elif defined(DEV_NPX)
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npxresume(susppcbs[0]->sp_fpususpend);
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#endif
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}
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return (1); /* wakeup successfully */
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}
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int
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acpi_wakeup_machdep(struct acpi_softc *sc, int state, int sleep_result,
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int intr_enabled)
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{
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if (sleep_result == -1)
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return (sleep_result);
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if (!intr_enabled) {
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/* Wakeup MD procedures in interrupt disabled context */
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if (sleep_result == 1) {
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pmap_init_pat();
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initializecpu();
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PCPU_SET(switchtime, 0);
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PCPU_SET(switchticks, ticks);
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#ifdef SMP
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if (!CPU_EMPTY(&suspcpus))
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acpi_wakeup_cpus(sc);
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#endif
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}
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#ifdef SMP
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if (!CPU_EMPTY(&suspcpus))
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restart_cpus(suspcpus);
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#endif
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mca_resume();
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#ifdef __amd64__
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if (vmm_resume_p != NULL)
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vmm_resume_p();
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#endif
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intr_resume(/*suspend_cancelled*/false);
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AcpiSetFirmwareWakingVector(0);
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} else {
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/* Wakeup MD procedures in interrupt enabled context */
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if (sleep_result == 1 && mem_range_softc.mr_op != NULL &&
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mem_range_softc.mr_op->reinit != NULL)
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mem_range_softc.mr_op->reinit(&mem_range_softc);
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}
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return (sleep_result);
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}
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static void *
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acpi_alloc_wakeup_handler(void)
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{
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void *wakeaddr;
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int i;
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/*
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* Specify the region for our wakeup code. We want it in the low 1 MB
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* region, excluding real mode IVT (0-0x3ff), BDA (0x400-0x4ff), EBDA
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* (less than 128KB, below 0xa0000, must be excluded by SMAP and DSDT),
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* and ROM area (0xa0000 and above). The temporary page tables must be
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* page-aligned.
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*/
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wakeaddr = contigmalloc((ACPI_PAGETABLES + 1) * PAGE_SIZE, M_DEVBUF,
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M_WAITOK, 0x500, 0xa0000, PAGE_SIZE, 0ul);
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if (wakeaddr == NULL) {
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printf("%s: can't alloc wake memory\n", __func__);
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return (NULL);
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}
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if (EVENTHANDLER_REGISTER(power_resume, acpi_stop_beep, NULL,
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EVENTHANDLER_PRI_LAST) == NULL) {
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printf("%s: can't register event handler\n", __func__);
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contigfree(wakeaddr, (ACPI_PAGETABLES + 1) * PAGE_SIZE,
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M_DEVBUF);
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return (NULL);
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}
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susppcbs = malloc(mp_ncpus * sizeof(*susppcbs), M_DEVBUF, M_WAITOK);
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for (i = 0; i < mp_ncpus; i++) {
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susppcbs[i] = malloc(sizeof(**susppcbs), M_DEVBUF, M_WAITOK);
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susppcbs[i]->sp_fpususpend = alloc_fpusave(M_WAITOK);
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}
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return (wakeaddr);
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}
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void
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acpi_install_wakeup_handler(struct acpi_softc *sc)
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{
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static void *wakeaddr = NULL;
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#ifdef __amd64__
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uint64_t *pt4, *pt3, *pt2;
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int i;
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#endif
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if (wakeaddr != NULL)
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return;
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wakeaddr = acpi_alloc_wakeup_handler();
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if (wakeaddr == NULL)
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return;
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sc->acpi_wakeaddr = (vm_offset_t)wakeaddr;
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sc->acpi_wakephys = vtophys(wakeaddr);
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bcopy(wakecode, (void *)WAKECODE_VADDR(sc), sizeof(wakecode));
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/* Patch GDT base address, ljmp targets. */
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WAKECODE_FIXUP((bootgdtdesc + 2), uint32_t,
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WAKECODE_PADDR(sc) + bootgdt);
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WAKECODE_FIXUP((wakeup_sw32 + 2), uint32_t,
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WAKECODE_PADDR(sc) + wakeup_32);
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#ifdef __amd64__
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WAKECODE_FIXUP((wakeup_sw64 + 1), uint32_t,
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WAKECODE_PADDR(sc) + wakeup_64);
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WAKECODE_FIXUP(wakeup_pagetables, uint32_t, sc->acpi_wakephys);
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#endif
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/* Save pointers to some global data. */
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WAKECODE_FIXUP(wakeup_ret, void *, resumectx);
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#ifndef __amd64__
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#ifdef PAE
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WAKECODE_FIXUP(wakeup_cr3, register_t, vtophys(kernel_pmap->pm_pdpt));
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#else
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WAKECODE_FIXUP(wakeup_cr3, register_t, vtophys(kernel_pmap->pm_pdir));
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#endif
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#else
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/* Build temporary page tables below realmode code. */
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pt4 = wakeaddr;
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pt3 = pt4 + (PAGE_SIZE) / sizeof(uint64_t);
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pt2 = pt3 + (PAGE_SIZE) / sizeof(uint64_t);
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/* Create the initial 1GB replicated page tables */
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for (i = 0; i < 512; i++) {
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/*
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* Each slot of the level 4 pages points
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* to the same level 3 page
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*/
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pt4[i] = (uint64_t)(sc->acpi_wakephys + PAGE_SIZE);
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pt4[i] |= PG_V | PG_RW | PG_U;
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/*
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* Each slot of the level 3 pages points
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* to the same level 2 page
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*/
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pt3[i] = (uint64_t)(sc->acpi_wakephys + (2 * PAGE_SIZE));
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pt3[i] |= PG_V | PG_RW | PG_U;
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/* The level 2 page slots are mapped with 2MB pages for 1GB. */
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pt2[i] = i * (2 * 1024 * 1024);
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pt2[i] |= PG_V | PG_RW | PG_PS | PG_U;
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}
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#endif
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if (bootverbose)
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device_printf(sc->acpi_dev, "wakeup code va %#jx pa %#jx\n",
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(uintmax_t)sc->acpi_wakeaddr, (uintmax_t)sc->acpi_wakephys);
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}
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