Neel Natu 4c98655ece The "SUB" instruction used in getcc() actually does 'x -= y' so use the ... proper constraint for 'x'. The "+r" constraint indicates that 'x' is an input and output register operand. While here generate code for different variants of getcc() using a macro GETCC(sz) where 'sz' indicates the operand size. Update the status bits in %rflags when emulating AND and OR opcodes. Reviewed by: grehan		2014-08-30 19:59:42 +00:00
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acpica	don't set CR4 PSE bit on amd64	2014-07-23 15:53:29 +00:00
amd64	Minor space/tab cleanups.	2014-08-30 15:41:07 +00:00
conf	Fix build of si(4) and enable it in LINT on amd64 and i386.	2014-08-20 16:07:17 +00:00
ia32	x86: Allow users to change PSL_RF via ptrace(PT_SETREGS...)	2013-11-14 15:37:20 +00:00
include	- Add a new structure type for the ACPI 3.0 SMAP entry that includes the	2014-08-29 21:25:47 +00:00
linux32	Revert r266925 as it can lead to instant panic at fexecve():	2014-06-17 05:29:18 +00:00
pci	Pull in r267961 and r267973 again. Fix for issues reported will follow.	2014-06-28 03:56:17 +00:00
vmm	The "SUB" instruction used in getcc() actually does 'x -= y' so use the	2014-08-30 19:59:42 +00:00
Makefile	Adjustments to make a tags file a bit more suitable to amd64.	2008-12-01 14:15:10 +00:00