21c3015a24
the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
289 lines
6.8 KiB
C
289 lines
6.8 KiB
C
/*-
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* Copyright (c) 1998 Doug Rabson
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/malloc.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <alpha/pci/lcareg.h>
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#include <alpha/pci/lcavar.h>
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#include <alpha/pci/pcibus.h>
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#include <alpha/isa/isavar.h>
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#include <machine/intr.h>
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#include <machine/resource.h>
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#include <machine/cpuconf.h>
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#include <machine/swiz.h>
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#include <machine/sgmap.h>
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#include <vm/vm.h>
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#include <vm/vm_page.h>
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#define KV(pa) ALPHA_PHYS_TO_K0SEG(pa)
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static devclass_t lca_devclass;
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static device_t lca0; /* XXX only one for now */
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struct lca_softc {
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int junk;
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};
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#define LCA_SOFTC(dev) (struct lca_softc*) device_get_softc(dev)
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static alpha_chipset_read_hae_t lca_read_hae;
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static alpha_chipset_write_hae_t lca_write_hae;
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static alpha_chipset_t lca_chipset = {
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lca_read_hae,
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lca_write_hae,
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};
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/*
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* The LCA HAE is write-only. According to NetBSD, this is where it starts.
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*/
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static u_int32_t lca_hae_mem = 0x80000000;
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/*
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* The first 16Mb ignores the HAE. The next 112Mb uses the HAE to set
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* the high bits of the PCI address.
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*/
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#define REG1 (1UL << 24)
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static u_int32_t
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lca_set_hae_mem(void *arg, u_int32_t pa)
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{
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int s;
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u_int32_t msb;
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if(pa >= REG1){
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msb = pa & 0xf8000000;
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pa -= msb;
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s = splhigh();
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if (msb != lca_hae_mem) {
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lca_hae_mem = msb;
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REGVAL(LCA_IOC_HAE) = lca_hae_mem;
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alpha_mb();
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alpha_mb();
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}
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splx(s);
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}
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return pa;
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}
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static u_int64_t
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lca_read_hae(void)
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{
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return lca_hae_mem & 0xf8000000;
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}
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static void
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lca_write_hae(u_int64_t hae)
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{
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u_int32_t pa = hae;
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lca_set_hae_mem(0, pa);
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}
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static int lca_probe(device_t dev);
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static int lca_attach(device_t dev);
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static struct resource *lca_alloc_resource(device_t bus, device_t child,
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int type, int *rid, u_long start,
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u_long end, u_long count,
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u_int flags);
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static int lca_release_resource(device_t bus, device_t child,
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int type, int rid, struct resource *r);
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static device_method_t lca_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, lca_probe),
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DEVMETHOD(device_attach, lca_attach),
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/* Bus interface */
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DEVMETHOD(bus_alloc_resource, lca_alloc_resource),
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DEVMETHOD(bus_release_resource, lca_release_resource),
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DEVMETHOD(bus_activate_resource, pci_activate_resource),
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DEVMETHOD(bus_deactivate_resource, pci_deactivate_resource),
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DEVMETHOD(bus_setup_intr, isa_setup_intr),
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DEVMETHOD(bus_teardown_intr, isa_teardown_intr),
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{ 0, 0 }
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};
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static driver_t lca_driver = {
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"lca",
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lca_methods,
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sizeof(struct lca_softc),
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};
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#define LCA_SGMAP_BASE (8*1024*1024)
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#define LCA_SGMAP_SIZE (8*1024*1024)
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static void
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lca_sgmap_invalidate(void)
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{
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alpha_mb();
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REGVAL(LCA_IOC_TBIA) = 0;
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alpha_mb();
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}
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static void
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lca_sgmap_map(void *arg, bus_addr_t ba, vm_offset_t pa)
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{
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u_int64_t *sgtable = arg;
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int index = alpha_btop(ba - LCA_SGMAP_BASE);
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if (pa) {
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if (pa > (1L<<32))
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panic("lca_sgmap_map: can't map address 0x%lx", pa);
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sgtable[index] = ((pa >> 13) << 1) | 1;
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} else {
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sgtable[index] = 0;
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}
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alpha_mb();
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lca_sgmap_invalidate();
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}
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static void
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lca_init_sgmap(void)
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{
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void *sgtable;
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/*
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* First setup Window 0 to map 8Mb to 16Mb with an
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* sgmap. Allocate the map aligned to a 32 boundary.
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*/
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REGVAL64(LCA_IOC_W_BASE0) = LCA_SGMAP_BASE |
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IOC_W_BASE_SG | IOC_W_BASE_WEN;
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alpha_mb();
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REGVAL64(LCA_IOC_W_MASK0) = IOC_W_MASK_8M;
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alpha_mb();
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sgtable = contigmalloc(8192, M_DEVBUF, M_NOWAIT,
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0, (1L<<34),
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32*1024, (1L<<34));
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if (!sgtable)
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panic("lca_init_sgmap: can't allocate page table");
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chipset.sgmap = sgmap_map_create(LCA_SGMAP_BASE,
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LCA_SGMAP_BASE + LCA_SGMAP_SIZE,
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lca_sgmap_map, sgtable);
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REGVAL64(LCA_IOC_W_T_BASE0) = pmap_kextract((vm_offset_t) sgtable);
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alpha_mb();
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REGVAL64(LCA_IOC_TB_ENA) = IOC_TB_ENA_TEN;
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alpha_mb();
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lca_sgmap_invalidate();
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}
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void
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lca_init()
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{
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static int initted = 0;
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static struct swiz_space io_space, mem_space;
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if (initted) return;
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initted = 1;
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swiz_init_space(&io_space, KV(LCA_PCI_SIO));
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swiz_init_space_hae(&mem_space, KV(LCA_PCI_SPARSE),
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lca_set_hae_mem, 0);
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busspace_isa_io = (struct alpha_busspace *) &io_space;
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busspace_isa_mem = (struct alpha_busspace *) &mem_space;
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/* Type 0 PCI conf access. */
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REGVAL64(LCA_IOC_CONF) = 0;
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if (platform.pci_intr_init)
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platform.pci_intr_init();
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chipset = lca_chipset;
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}
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static int
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lca_probe(device_t dev)
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{
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if (lca0)
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return ENXIO;
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lca0 = dev;
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device_set_desc(dev, "21066 Core Logic chipset"); /* XXX */
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pci_init_resources();
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isa_init_intr();
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lca_init_sgmap();
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device_add_child(dev, "pcib", 0);
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return 0;
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}
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static int
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lca_attach(device_t dev)
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{
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lca_init();
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set_iointr(alpha_dispatch_intr);
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snprintf(chipset_type, sizeof(chipset_type), "lca");
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chipset_bwx = 0;
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chipset_ports = LCA_PCI_SIO;
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chipset_memory = LCA_PCI_SPARSE;
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chipset_dense = LCA_PCI_DENSE;
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chipset_hae_mask = IOC_HAE_ADDREXT;
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bus_generic_attach(dev);
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return 0;
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}
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static struct resource *
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lca_alloc_resource(device_t bus, device_t child, int type, int *rid,
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u_long start, u_long end, u_long count, u_int flags)
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{
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if (type == SYS_RES_IRQ)
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return isa_alloc_intr(bus, child, start);
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else
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return pci_alloc_resource(bus, child, type, rid,
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start, end, count, flags);
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}
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static int
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lca_release_resource(device_t bus, device_t child, int type, int rid,
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struct resource *r)
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{
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if (type == SYS_RES_IRQ)
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return isa_release_intr(bus, child, r);
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else
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return pci_release_resource(bus, child, type, rid, r);
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}
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DRIVER_MODULE(lca, root, lca_driver, lca_devclass, 0, 0);
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