9ed346bab0
mtx_enter(lock, type) becomes: mtx_lock(lock) for sleep locks (MTX_DEF-initialized locks) mtx_lock_spin(lock) for spin locks (MTX_SPIN-initialized) similarily, for releasing a lock, we now have: mtx_unlock(lock) for MTX_DEF and mtx_unlock_spin(lock) for MTX_SPIN. We change the caller interface for the two different types of locks because the semantics are entirely different for each case, and this makes it explicitly clear and, at the same time, it rids us of the extra `type' argument. The enter->lock and exit->unlock change has been made with the idea that we're "locking data" and not "entering locked code" in mind. Further, remove all additional "flags" previously passed to the lock acquire/release routines with the exception of two: MTX_QUIET and MTX_NOSWITCH The functionality of these flags is preserved and they can be passed to the lock/unlock routines by calling the corresponding wrappers: mtx_{lock, unlock}_flags(lock, flag(s)) and mtx_{lock, unlock}_spin_flags(lock, flag(s)) for MTX_DEF and MTX_SPIN locks, respectively. Re-inline some lock acq/rel code; in the sleep lock case, we only inline the _obtain_lock()s in order to ensure that the inlined code fits into a cache line. In the spin lock case, we inline recursion and actually only perform a function call if we need to spin. This change has been made with the idea that we generally tend to avoid spin locks and that also the spin locks that we do have and are heavily used (i.e. sched_lock) do recurse, and therefore in an effort to reduce function call overhead for some architectures (such as alpha), we inline recursion for this case. Create a new malloc type for the witness code and retire from using the M_DEV type. The new type is called M_WITNESS and is only declared if WITNESS is enabled. Begin cleaning up some machdep/mutex.h code - specifically updated the "optimized" inlined code in alpha/mutex.h and wrote MTX_LOCK_SPIN and MTX_UNLOCK_SPIN asm macros for the i386/mutex.h as we presently need those. Finally, caught up to the interface changes in all sys code. Contributors: jake, jhb, jasone (in no particular order)
678 lines
20 KiB
C
678 lines
20 KiB
C
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/*
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* ichsmb.c
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*
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* Copyright (c) 2000 Whistle Communications, Inc.
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* All rights reserved.
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*
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* Subject to the following obligations and disclaimer of warranty, use and
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* redistribution of this software, in source or object code forms, with or
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* without modifications are expressly permitted by Whistle Communications;
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* provided, however, that:
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* 1. Any and all reproductions of the source or object code must include the
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* copyright notice above and the following disclaimer of warranties; and
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* 2. No rights are granted, in any manner or form, to use Whistle
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* Communications, Inc. trademarks, including the mark "WHISTLE
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* COMMUNICATIONS" on advertising, endorsements, or otherwise except as
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* such appears in the above copyright notice or in the software.
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*
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* THIS SOFTWARE IS BEING PROVIDED BY WHISTLE COMMUNICATIONS "AS IS", AND
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, WHISTLE COMMUNICATIONS MAKES NO
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* REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, REGARDING THIS SOFTWARE,
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* INCLUDING WITHOUT LIMITATION, ANY AND ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
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* WHISTLE COMMUNICATIONS DOES NOT WARRANT, GUARANTEE, OR MAKE ANY
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* REPRESENTATIONS REGARDING THE USE OF, OR THE RESULTS OF THE USE OF THIS
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* SOFTWARE IN TERMS OF ITS CORRECTNESS, ACCURACY, RELIABILITY OR OTHERWISE.
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* IN NO EVENT SHALL WHISTLE COMMUNICATIONS BE LIABLE FOR ANY DAMAGES
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* RESULTING FROM OR ARISING OUT OF ANY USE OF THIS SOFTWARE, INCLUDING
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* WITHOUT LIMITATION, ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
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* PUNITIVE, OR CONSEQUENTIAL DAMAGES, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES, LOSS OF USE, DATA OR PROFITS, HOWEVER CAUSED AND UNDER ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF WHISTLE COMMUNICATIONS IS ADVISED OF THE POSSIBILITY
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* OF SUCH DAMAGE.
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*
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* Author: Archie Cobbs <archie@freebsd.org>
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*
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* $FreeBSD$
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*/
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/*
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* Support for the SMBus controller logical device which is part of the
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* Intel 81801AA (ICH) and 81801AB (ICH0) I/O controller hub chips.
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*
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* This driver assumes that the generic SMBus code will ensure that
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* at most one process at a time calls into the SMBus methods below.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/errno.h>
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#include <sys/mutex.h>
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#include <sys/syslog.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <machine/resource.h>
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#include <dev/smbus/smbconf.h>
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#include <dev/ichsmb/ichsmb_var.h>
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#include <dev/ichsmb/ichsmb_reg.h>
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/*
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* Enable debugging by defining ICHSMB_DEBUG to a non-zero value.
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*/
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#define ICHSMB_DEBUG 0
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#if ICHSMB_DEBUG != 0 && defined(__GNUC__)
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#define DBG(fmt, args...) \
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do { log(LOG_DEBUG, "%s: " fmt, __FUNCTION__ , ## args); } while (0)
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#else
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#define DBG(fmt, args...) do { } while (0)
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#endif
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/*
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* Our child device driver name
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*/
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#define DRIVER_SMBUS "smbus"
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/*
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* Internal functions
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*/
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static int ichsmb_wait(sc_p sc);
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/********************************************************************
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BUS-INDEPENDENT BUS METHODS
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********************************************************************/
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/*
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* Handle probe-time duties that are independent of the bus
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* our device lives on.
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*/
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int
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ichsmb_probe(device_t dev)
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{
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device_t smb;
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/* Add child: an instance of the "smbus" device */
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if ((smb = device_add_child(dev, DRIVER_SMBUS, -1)) == NULL) {
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log(LOG_ERR, "%s: no \"%s\" child found\n",
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device_get_nameunit(dev), DRIVER_SMBUS);
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return (ENXIO);
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}
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return (0);
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}
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/*
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* Handle attach-time duties that are independent of the bus
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* our device lives on.
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*/
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int
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ichsmb_attach(device_t dev)
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{
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const sc_p sc = device_get_softc(dev);
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int error;
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/* Clear interrupt conditions */
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_STA, 0xff);
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/* Add "smbus" child */
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if ((error = bus_generic_attach(dev)) != 0) {
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log(LOG_ERR, "%s: failed to attach child: %d\n",
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device_get_nameunit(dev), error);
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return (ENXIO);
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}
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/* Create mutex */
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mtx_init(&sc->mutex, device_get_nameunit(dev), MTX_DEF);
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return (0);
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}
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/********************************************************************
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SMBUS METHODS
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********************************************************************/
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int
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ichsmb_callback(device_t dev, int index, caddr_t data)
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{
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int smb_error = 0;
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DBG("index=%d how=%d\n", index, data ? *(int *)data : -1);
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switch (index) {
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case SMB_REQUEST_BUS:
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break;
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case SMB_RELEASE_BUS:
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break;
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default:
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smb_error = SMB_EABORT; /* XXX */
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break;
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}
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DBG("smb_error=%d\n", smb_error);
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return (smb_error);
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}
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int
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ichsmb_quick(device_t dev, u_char slave, int how)
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{
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const sc_p sc = device_get_softc(dev);
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int smb_error;
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DBG("slave=0x%02x how=%d\n", slave, how);
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KASSERT(sc->ich_cmd == -1,
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("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
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switch (how) {
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case SMB_QREAD:
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case SMB_QWRITE:
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mtx_lock(&sc->mutex);
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sc->ich_cmd = ICH_HST_CNT_SMB_CMD_QUICK;
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
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(slave << 1) | (how == SMB_QREAD ?
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ICH_XMIT_SLVA_READ : ICH_XMIT_SLVA_WRITE));
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
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ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
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smb_error = ichsmb_wait(sc);
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mtx_unlock(&sc->mutex);
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break;
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default:
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smb_error = SMB_ENOTSUPP;
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}
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DBG("smb_error=%d\n", smb_error);
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return (smb_error);
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}
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int
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ichsmb_sendb(device_t dev, u_char slave, char byte)
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{
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const sc_p sc = device_get_softc(dev);
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int smb_error;
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DBG("slave=0x%02x byte=0x%02x\n", slave, (u_char)byte);
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KASSERT(sc->ich_cmd == -1,
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("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
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mtx_lock(&sc->mutex);
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sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE;
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
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(slave << 1) | ICH_XMIT_SLVA_WRITE);
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, byte);
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
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ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
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smb_error = ichsmb_wait(sc);
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mtx_unlock(&sc->mutex);
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DBG("smb_error=%d\n", smb_error);
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return (smb_error);
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}
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int
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ichsmb_recvb(device_t dev, u_char slave, char *byte)
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{
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const sc_p sc = device_get_softc(dev);
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int smb_error;
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DBG("slave=0x%02x\n", slave);
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KASSERT(sc->ich_cmd == -1,
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("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
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mtx_lock(&sc->mutex);
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sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE;
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
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(slave << 1) | ICH_XMIT_SLVA_READ);
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
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ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
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if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR)
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*byte = bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_D0);
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mtx_unlock(&sc->mutex);
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DBG("smb_error=%d byte=0x%02x\n", smb_error, (u_char)*byte);
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return (smb_error);
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}
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int
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ichsmb_writeb(device_t dev, u_char slave, char cmd, char byte)
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{
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const sc_p sc = device_get_softc(dev);
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int smb_error;
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DBG("slave=0x%02x cmd=0x%02x byte=0x%02x\n",
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slave, (u_char)cmd, (u_char)byte);
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KASSERT(sc->ich_cmd == -1,
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("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
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mtx_lock(&sc->mutex);
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sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE_DATA;
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
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(slave << 1) | ICH_XMIT_SLVA_WRITE);
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, byte);
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
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ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
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smb_error = ichsmb_wait(sc);
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mtx_unlock(&sc->mutex);
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DBG("smb_error=%d\n", smb_error);
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return (smb_error);
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}
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int
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ichsmb_writew(device_t dev, u_char slave, char cmd, short word)
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{
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const sc_p sc = device_get_softc(dev);
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int smb_error;
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DBG("slave=0x%02x cmd=0x%02x word=0x%04x\n",
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slave, (u_char)cmd, (u_int16_t)word);
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KASSERT(sc->ich_cmd == -1,
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("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
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mtx_lock(&sc->mutex);
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sc->ich_cmd = ICH_HST_CNT_SMB_CMD_WORD_DATA;
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
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(slave << 1) | ICH_XMIT_SLVA_WRITE);
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, word & 0xff);
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D1, word >> 8);
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
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ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
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smb_error = ichsmb_wait(sc);
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mtx_unlock(&sc->mutex);
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DBG("smb_error=%d\n", smb_error);
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return (smb_error);
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}
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int
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ichsmb_readb(device_t dev, u_char slave, char cmd, char *byte)
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{
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const sc_p sc = device_get_softc(dev);
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int smb_error;
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DBG("slave=0x%02x cmd=0x%02x\n", slave, (u_char)cmd);
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KASSERT(sc->ich_cmd == -1,
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("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
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mtx_lock(&sc->mutex);
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sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE_DATA;
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
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(slave << 1) | ICH_XMIT_SLVA_READ);
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
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ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
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if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR)
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*byte = bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_D0);
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mtx_unlock(&sc->mutex);
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DBG("smb_error=%d byte=0x%02x\n", smb_error, (u_char)*byte);
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return (smb_error);
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}
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int
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ichsmb_readw(device_t dev, u_char slave, char cmd, short *word)
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{
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const sc_p sc = device_get_softc(dev);
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int smb_error;
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DBG("slave=0x%02x cmd=0x%02x\n", slave, (u_char)cmd);
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KASSERT(sc->ich_cmd == -1,
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("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
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mtx_lock(&sc->mutex);
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sc->ich_cmd = ICH_HST_CNT_SMB_CMD_WORD_DATA;
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
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(slave << 1) | ICH_XMIT_SLVA_READ);
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
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ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
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if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR) {
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*word = (bus_space_read_1(sc->io_bst,
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sc->io_bsh, ICH_D0) & 0xff)
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| (bus_space_read_1(sc->io_bst,
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sc->io_bsh, ICH_D1) << 8);
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}
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mtx_unlock(&sc->mutex);
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DBG("smb_error=%d word=0x%04x\n", smb_error, (u_int16_t)*word);
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return (smb_error);
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}
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int
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ichsmb_pcall(device_t dev, u_char slave, char cmd, short sdata, short *rdata)
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{
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const sc_p sc = device_get_softc(dev);
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int smb_error;
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DBG("slave=0x%02x cmd=0x%02x sdata=0x%04x\n",
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slave, (u_char)cmd, (u_int16_t)sdata);
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KASSERT(sc->ich_cmd == -1,
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("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
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mtx_lock(&sc->mutex);
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sc->ich_cmd = ICH_HST_CNT_SMB_CMD_PROC_CALL;
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
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(slave << 1) | ICH_XMIT_SLVA_WRITE);
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, sdata & 0xff);
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D1, sdata >> 8);
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bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
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ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
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if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR) {
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*rdata = (bus_space_read_1(sc->io_bst,
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sc->io_bsh, ICH_D0) & 0xff)
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| (bus_space_read_1(sc->io_bst,
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sc->io_bsh, ICH_D1) << 8);
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}
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mtx_unlock(&sc->mutex);
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DBG("smb_error=%d rdata=0x%04x\n", smb_error, (u_int16_t)*rdata);
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return (smb_error);
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}
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int
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ichsmb_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf)
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{
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const sc_p sc = device_get_softc(dev);
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int smb_error;
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DBG("slave=0x%02x cmd=0x%02x count=%d\n", slave, (u_char)cmd, count);
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#if ICHSMB_DEBUG
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#define DISP(ch) (((ch) < 0x20 || (ch) >= 0x7e) ? '.' : (ch))
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{
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u_char *p;
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for (p = (u_char *)buf; p - (u_char *)buf < 32; p += 8) {
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DBG("%02x: %02x %02x %02x %02x %02x %02x %02x %02x"
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" %c%c%c%c%c%c%c%c", (p - (u_char *)buf),
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p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7],
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DISP(p[0]), DISP(p[1]), DISP(p[2]), DISP(p[3]),
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DISP(p[4]), DISP(p[5]), DISP(p[6]), DISP(p[7]));
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}
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}
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#undef DISP
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#endif
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KASSERT(sc->ich_cmd == -1,
|
|
("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
|
|
if (count < 1 || count > 32)
|
|
return (EINVAL);
|
|
bcopy(buf, sc->block_data, count);
|
|
sc->block_count = count;
|
|
sc->block_index = 1;
|
|
sc->block_write = 1;
|
|
|
|
mtx_lock(&sc->mutex);
|
|
sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BLOCK;
|
|
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
|
|
(slave << 1) | ICH_XMIT_SLVA_WRITE);
|
|
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
|
|
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, count);
|
|
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_BLOCK_DB, buf[0]);
|
|
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
|
|
ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
|
|
smb_error = ichsmb_wait(sc);
|
|
mtx_unlock(&sc->mutex);
|
|
DBG("smb_error=%d\n", smb_error);
|
|
return (smb_error);
|
|
}
|
|
|
|
int
|
|
ichsmb_bread(device_t dev, u_char slave, char cmd, u_char count, char *buf)
|
|
{
|
|
const sc_p sc = device_get_softc(dev);
|
|
int smb_error;
|
|
|
|
DBG("slave=0x%02x cmd=0x%02x count=%d\n", slave, (u_char)cmd, count);
|
|
KASSERT(sc->ich_cmd == -1,
|
|
("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
|
|
if (count < 1 || count > 32)
|
|
return (EINVAL);
|
|
bzero(sc->block_data, sizeof(sc->block_data));
|
|
sc->block_count = count;
|
|
sc->block_index = 0;
|
|
sc->block_write = 0;
|
|
|
|
mtx_lock(&sc->mutex);
|
|
sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BLOCK;
|
|
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_XMIT_SLVA,
|
|
(slave << 1) | ICH_XMIT_SLVA_READ);
|
|
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CMD, cmd);
|
|
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_D0, count); /* XXX? */
|
|
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_CNT,
|
|
ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
|
|
if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR)
|
|
bcopy(sc->block_data, buf, sc->block_count);
|
|
mtx_unlock(&sc->mutex);
|
|
DBG("smb_error=%d\n", smb_error);
|
|
#if ICHSMB_DEBUG
|
|
#define DISP(ch) (((ch) < 0x20 || (ch) >= 0x7e) ? '.' : (ch))
|
|
{
|
|
u_char *p;
|
|
|
|
for (p = (u_char *)buf; p - (u_char *)buf < 32; p += 8) {
|
|
DBG("%02x: %02x %02x %02x %02x %02x %02x %02x %02x"
|
|
" %c%c%c%c%c%c%c%c", (p - (u_char *)buf),
|
|
p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7],
|
|
DISP(p[0]), DISP(p[1]), DISP(p[2]), DISP(p[3]),
|
|
DISP(p[4]), DISP(p[5]), DISP(p[6]), DISP(p[7]));
|
|
}
|
|
}
|
|
#undef DISP
|
|
#endif
|
|
return (smb_error);
|
|
}
|
|
|
|
/********************************************************************
|
|
OTHER FUNCTIONS
|
|
********************************************************************/
|
|
|
|
/*
|
|
* This table describes what interrupts we should ever expect to
|
|
* see after each ICH command, not including the SMBALERT interrupt.
|
|
*/
|
|
static const u_int8_t ichsmb_state_irqs[] = {
|
|
/* quick */
|
|
(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
|
|
/* byte */
|
|
(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
|
|
/* byte data */
|
|
(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
|
|
/* word data */
|
|
(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
|
|
/* process call */
|
|
(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
|
|
/* block */
|
|
(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR
|
|
| ICH_HST_STA_BYTE_DONE_STS),
|
|
/* i2c read (not used) */
|
|
(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR
|
|
| ICH_HST_STA_BYTE_DONE_STS)
|
|
};
|
|
|
|
/*
|
|
* Interrupt handler. This handler is bus-independent. Note that our
|
|
* interrupt may be shared, so we must handle "false" interrupts.
|
|
*/
|
|
void
|
|
ichsmb_device_intr(void *cookie)
|
|
{
|
|
const sc_p sc = cookie;
|
|
const device_t dev = sc->dev;
|
|
const int maxloops = 16;
|
|
u_int8_t status;
|
|
u_int8_t ok_bits;
|
|
int cmd_index;
|
|
int count;
|
|
|
|
mtx_lock(&sc->mutex);
|
|
for (count = 0; count < maxloops; count++) {
|
|
|
|
/* Get and reset status bits */
|
|
status = bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_HST_STA);
|
|
#if ICHSMB_DEBUG
|
|
if ((status & ~(ICH_HST_STA_INUSE_STS | ICH_HST_STA_HOST_BUSY))
|
|
|| count > 0) {
|
|
DBG("%d stat=0x%02x\n", count, status);
|
|
}
|
|
#endif
|
|
status &= ~(ICH_HST_STA_INUSE_STS | ICH_HST_STA_HOST_BUSY);
|
|
if (status == 0)
|
|
break;
|
|
|
|
/* Check for unexpected interrupt */
|
|
ok_bits = ICH_HST_STA_SMBALERT_STS;
|
|
cmd_index = sc->ich_cmd >> 2;
|
|
if (sc->ich_cmd != -1) {
|
|
KASSERT(cmd_index < sizeof(ichsmb_state_irqs),
|
|
("%s: ich_cmd=%d", device_get_nameunit(dev),
|
|
sc->ich_cmd));
|
|
ok_bits |= ichsmb_state_irqs[cmd_index];
|
|
}
|
|
if ((status & ~ok_bits) != 0) {
|
|
log(LOG_ERR, "%s: irq 0x%02x during %d\n",
|
|
device_get_nameunit(dev), status, cmd_index);
|
|
bus_space_write_1(sc->io_bst, sc->io_bsh,
|
|
ICH_HST_STA, (status & ~ok_bits));
|
|
continue;
|
|
}
|
|
|
|
/* Handle SMBALERT interrupt */
|
|
if (status & ICH_HST_STA_SMBALERT_STS) {
|
|
static int smbalert_count = 16;
|
|
if (smbalert_count > 0) {
|
|
log(LOG_WARNING, "%s: SMBALERT# rec'd\n",
|
|
device_get_nameunit(dev));
|
|
if (--smbalert_count == 0) {
|
|
log(LOG_WARNING,
|
|
"%s: not logging anymore\n",
|
|
device_get_nameunit(dev));
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Check for bus error */
|
|
if (status & ICH_HST_STA_BUS_ERR) {
|
|
sc->smb_error = SMB_ECOLLI; /* XXX SMB_EBUSERR? */
|
|
goto finished;
|
|
}
|
|
|
|
/* Check for device error */
|
|
if (status & ICH_HST_STA_DEV_ERR) {
|
|
sc->smb_error = SMB_ENOACK; /* or SMB_ETIMEOUT? */
|
|
goto finished;
|
|
}
|
|
|
|
/* Check for byte completion in block transfer */
|
|
if (status & ICH_HST_STA_BYTE_DONE_STS) {
|
|
if (sc->block_write) {
|
|
if (sc->block_index < sc->block_count) {
|
|
|
|
/* Write next byte */
|
|
bus_space_write_1(sc->io_bst,
|
|
sc->io_bsh, ICH_BLOCK_DB,
|
|
sc->block_data[sc->block_index++]);
|
|
}
|
|
} else {
|
|
|
|
/* First interrupt, get the count also */
|
|
if (sc->block_index == 0) {
|
|
sc->block_count = bus_space_read_1(
|
|
sc->io_bst, sc->io_bsh, ICH_D0);
|
|
}
|
|
|
|
/* Get next byte, if any */
|
|
if (sc->block_index < sc->block_count) {
|
|
|
|
/* Read next byte */
|
|
sc->block_data[sc->block_index++] =
|
|
bus_space_read_1(sc->io_bst,
|
|
sc->io_bsh, ICH_BLOCK_DB);
|
|
|
|
/* Set "LAST_BYTE" bit before reading
|
|
the last byte of block data */
|
|
if (sc->block_index
|
|
>= sc->block_count - 1) {
|
|
bus_space_write_1(sc->io_bst,
|
|
sc->io_bsh, ICH_HST_CNT,
|
|
ICH_HST_CNT_LAST_BYTE
|
|
| ICH_HST_CNT_INTREN
|
|
| sc->ich_cmd);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Check command completion */
|
|
if (status & ICH_HST_STA_INTR) {
|
|
sc->smb_error = SMB_ENOERR;
|
|
finished:
|
|
sc->ich_cmd = -1;
|
|
bus_space_write_1(sc->io_bst, sc->io_bsh,
|
|
ICH_HST_STA, status);
|
|
wakeup(sc);
|
|
break;
|
|
}
|
|
|
|
/* Clear status bits and try again */
|
|
bus_space_write_1(sc->io_bst, sc->io_bsh, ICH_HST_STA, status);
|
|
}
|
|
mtx_unlock(&sc->mutex);
|
|
|
|
/* Too many loops? */
|
|
if (count == maxloops) {
|
|
log(LOG_ERR, "%s: interrupt loop, status=0x%02x\n",
|
|
device_get_nameunit(dev),
|
|
bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_HST_STA));
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Wait for command completion. Assumes mutex is held.
|
|
* Returns an SMB_* error code.
|
|
*/
|
|
static int
|
|
ichsmb_wait(sc_p sc)
|
|
{
|
|
const device_t dev = sc->dev;
|
|
int error, smb_error;
|
|
|
|
KASSERT(sc->ich_cmd != -1,
|
|
("%s: ich_cmd=%d\n", __FUNCTION__ , sc->ich_cmd));
|
|
mtx_assert(&sc->mutex, MA_OWNED);
|
|
sleep:
|
|
error = msleep(sc, &sc->mutex, PZERO | PCATCH, "ichsmb", hz / 4);
|
|
DBG("msleep -> %d\n", error);
|
|
switch (error) {
|
|
case ERESTART:
|
|
if (sc->ich_cmd != -1)
|
|
goto sleep;
|
|
/* FALLTHROUGH */
|
|
case 0:
|
|
smb_error = sc->smb_error;
|
|
break;
|
|
case EWOULDBLOCK:
|
|
log(LOG_ERR, "%s: device timeout, status=0x%02x\n",
|
|
device_get_nameunit(dev),
|
|
bus_space_read_1(sc->io_bst, sc->io_bsh, ICH_HST_STA));
|
|
sc->ich_cmd = -1;
|
|
smb_error = SMB_ETIMEOUT;
|
|
break;
|
|
default:
|
|
smb_error = SMB_EABORT;
|
|
break;
|
|
}
|
|
return (smb_error);
|
|
}
|
|
|
|
/*
|
|
* Release resources associated with device.
|
|
*/
|
|
void
|
|
ichsmb_release_resources(sc_p sc)
|
|
{
|
|
const device_t dev = sc->dev;
|
|
|
|
if (sc->irq_handle != NULL) {
|
|
bus_teardown_intr(dev, sc->irq_res, sc->irq_handle);
|
|
sc->irq_handle = NULL;
|
|
}
|
|
if (sc->irq_res != NULL) {
|
|
bus_release_resource(dev,
|
|
SYS_RES_IRQ, sc->irq_rid, sc->irq_res);
|
|
sc->irq_res = NULL;
|
|
}
|
|
if (sc->io_res != NULL) {
|
|
bus_release_resource(dev,
|
|
SYS_RES_IOPORT, sc->io_rid, sc->io_res);
|
|
sc->io_res = NULL;
|
|
}
|
|
}
|
|
|